Titlebook: VLSI Algorithms and Architectures; Aegean Workshop on C Filia Makedon,Kurt Mehlhorn,P. Spirakis Conference proceedings 1986 Springer-Verlag

HEIR

書目名稱VLSI Algorithms and Architectures影響因子(影響力)




書目名稱VLSI Algorithms and Architectures影響因子(影響力)學(xué)科排名




書目名稱VLSI Algorithms and Architectures網(wǎng)絡(luò)公開度




書目名稱VLSI Algorithms and Architectures網(wǎng)絡(luò)公開度學(xué)科排名




書目名稱VLSI Algorithms and Architectures被引頻次




書目名稱VLSI Algorithms and Architectures被引頻次學(xué)科排名




書目名稱VLSI Algorithms and Architectures年度引用




書目名稱VLSI Algorithms and Architectures年度引用學(xué)科排名




書目名稱VLSI Algorithms and Architectures讀者反饋




書目名稱VLSI Algorithms and Architectures讀者反饋學(xué)科排名

尖牙

Two processor scheduling is in ,,ystems with arbitrary precedence constraints using a polynomial number of processors and running in time polylog in the size of the input. Whereas previous parallel solutions for the problem made extensive use of randomization, our algorithm is completely deterministic and based on an interesting it

疏忽

Parallel ear decomposition search (EDS) and st-numbering in graphs,algorithm is based on depth-first search (DFS). A known conjecture states that DFS, which is a key technique in designing serial algorithms, is not amenable to poly-log time parallelism using "around linearly" (or even polynomially) many processors. The first contribution of this paper is a general

偽造

A unifying framework for systolic designs,fewer processing elements than previously considered ones. The synthesis method consists of two parts: 1) deriving from the high-level problem specification a form more suitable to VLSI implementation; 2) mapping the new specification into physical hardware. The method also provides a unifying frame

向下五度才偏

Optimal tradeoffs for addition on systolic arrays,y, including:.For all combinations of the above constraints, we obtain optimal tradeoffs among the resources of area, pipeline delay, and worst-case time. It turns out that there is a subtle interplay among the constraints and some of our results seem counter intuitive. For instance, we show that al

CLIFF

ingenue

哥哥噴涌而出

,Diogenes, circa 1986 Ψαχνω για ενα τιμιo αν?ρoπo,graph and is . then, the book embedding is converted to an efficient fault-tolerant layout of the array. We survey here work on both stages of the methodology, highlighting recent progress and pointing out remaining challenges.

occult

Nonsequential computation and laws of nature,ted for. This attitude has persisted in common models for parallel computations. Wrongly, as we shall argue, since the laws of physics intrude forcefully when we want to obtain realistic estimates of the performance of parallel or distributed algorithms. First, we shall explain why it is reasonable

欄桿