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Titlebook: Lifetime Reliability-aware Design of Integrated Circuits; Mohsen Raji,Behnam Ghavami Book 2023 The Editor(s) (if applicable) and The Autho

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樓主: Iodine
31#
發(fā)表于 2025-3-27 00:01:55 | 只看該作者
32#
發(fā)表于 2025-3-27 02:37:42 | 只看該作者
Restructuring-Based Lifetime Reliability Improvement of Nanoscale Master-Slave Flip-Flops,functionality of flip-flops (FFs), which is one of the most important elements in digital circuits, plays a key role in the reliability of modern circuit designs. In this chapter, a timing reliability improvement technique is proposed for master-slave FFs, taking into account the impacts of process
33#
發(fā)表于 2025-3-27 08:12:25 | 只看該作者
Lifetime Reliability Improvement of Pulsed Flip-Flops,ufacturing process variation and aging phenomena, affecting the reliability of these FFs. In this chapter, the timing reliability of pulsed FFs is improved using a transistor-level restructuring technique. In this technique, we modify the pull-down network of pulsed FFs to decrease the stress time (
34#
發(fā)表于 2025-3-27 12:52:49 | 只看該作者
35#
發(fā)表于 2025-3-27 16:08:06 | 只看該作者
Joint Timing Yield and Lifetime Reliability Optimization of Integrated Circuits,d yield. In this chapter, we propose a new two-phase gate sizing approach in order to improve the reliability of circuits while considering the joint effects of process variation and transistor aging. In the first stage, the initial delay of the circuit is optimized to improve its timing yield. Then
36#
發(fā)表于 2025-3-27 18:39:03 | 只看該作者
37#
發(fā)表于 2025-3-28 00:52:02 | 只看該作者
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