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Titlebook: Chip Multiprocessor Architecture; Techniques to Improv Kunle Olukotun,Lance Hammond,James Laudon Book 2007 Springer Nature Switzerland AG 2

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發(fā)表于 2025-3-21 16:07:47 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
書目名稱Chip Multiprocessor Architecture
副標(biāo)題Techniques to Improv
編輯Kunle Olukotun,Lance Hammond,James Laudon
視頻videohttp://file.papertrans.cn/226/225936/225936.mp4
叢書名稱Synthesis Lectures on Computer Architecture
圖書封面Titlebook: Chip Multiprocessor Architecture; Techniques to Improv Kunle Olukotun,Lance Hammond,James Laudon Book 2007 Springer Nature Switzerland AG 2
描述Chip multiprocessors - also called multi-core microprocessors or CMPs for short - are now the only way to build high-performance microprocessors, for a variety of reasons. Large uniprocessors are no longer scaling in performance, because it is only possible to extract a limited amount of parallelism from a typical instruction stream using conventional superscalar instruction issue techniques. In addition, one cannot simply ratchet up the clock speed on today‘s processors, or the power dissipation will become prohibitive in all but water-cooled systems. Compounding these problems is the simple fact that with the immense numbers of transistors available on today‘s microprocessor chips, it is too costly to design and debug ever-larger processors every year or two. CMPs avoid these problems by filling up a processor die with multiple, relatively simpler processor cores instead of just one huge core. The exact size of a CMP‘s cores can vary from very simple pipelines to moderately complex superscalar processors, but once a core has been selected the CMP‘s performance can easily scale across silicon process generations simply by stamping down more copies of the hard-to-design, high-speed
出版日期Book 2007
版次1
doihttps://doi.org/10.1007/978-3-031-01720-9
isbn_softcover978-3-031-00592-3
isbn_ebook978-3-031-01720-9Series ISSN 1935-3235 Series E-ISSN 1935-3243
issn_series 1935-3235
copyrightSpringer Nature Switzerland AG 2007
The information of publication is updating

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https://doi.org/10.1007/978-1-4020-8198-9us spell checking. Users of many large, computation-bound applications, such as most simulations and compilations, are typically also more interested in how long the programs take to execute than in executing many in parallel.
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Synthesis Lectures on Computer Architecturehttp://image.papertrans.cn/c/image/225936.jpg
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Solid Mechanics and Its ApplicationsIntel processors, for two main reasons. First, the transistors that are the heart of the circuits in all processors and memory chips have simply become faster over time on a course described by Moore’s law [1], and this directly affects the performance of processors built with those transistors. Mor
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