| 書(shū)目名稱 | VLSI Specification, Verification and Synthesis | | 編輯 | Graham Birtwistle,P. A. Subrahmanyam | | 視頻video | http://file.papertrans.cn/981/980102/980102.mp4 | | 叢書(shū)名稱 | The Springer International Series in Engineering and Computer Science | | 圖書(shū)封面 |  | | 描述 | VLSI Specification, Verification and Synthesis Proceedings of a workshop held in Calgary from 12-16 January 1987. The collection of papers in this book represents some of the discussions and presentations at a workshop on hardware verification held in Calgary, January 12-16 1987. The thrust of the workshop was to give the floor to a few leading researchers involved in the use of formal approaches to VLSI design, and provide them ample time to develop not only their latest ideas but also the evolution of these ideas. In contrast to simulation, where the objective is to assist in detecting errors in system behavior in the case of some selected inputs, the intent of hardware verification is to formally prove that a chip design meets a specification of its intended behavior (for all acceptable inputs). There are several important applications where formal verification of designs may be argued to be cost-effective. Examples include hardware components used in "safety critical" applications such as flight control, industrial plants, and medical life-support systems (such as pacemakers). The problems are of such magnitude in certain defense applications that the UK Ministry of Defense fee | | 出版日期 | Book 1988 | | 關(guān)鍵詞 | Hardware; VLSI; design; formal verification; simulation; verification | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4613-2007-4 | | isbn_softcover | 978-1-4612-9197-8 | | isbn_ebook | 978-1-4613-2007-4Series ISSN 0893-3405 | | issn_series | 0893-3405 | | copyright | Springer Science+Business Media New York 1988 |
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