| 書目名稱 | The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits | | 副標(biāo)題 | The semi-empirical a | | 編輯 | Paul Jespers | | 視頻video | http://file.papertrans.cn/923/922527/922527.mp4 | | 概述 | Sizing methodology for analog CMOS circuits.Low-voltage low-power circuits.Large signal compact modelling of submicron transistors.Parameter acquisition | | 叢書名稱 | Analog Circuits and Signal Processing | | 圖書封面 |  | | 描述 | .In "The g.m./I.D. Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits", we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files found on extras-springer.com? allow redoing the tests.. | | 出版日期 | Book 20101st edition | | 關(guān)鍵詞 | CMOS; ROM; Transistor; integrated circuit; large signal compact models; low-voltage, low-power analog CMO | | 版次 | 1 | | doi | https://doi.org/10.1007/978-0-387-47101-3 | | isbn_softcover | 978-1-4614-2505-2 | | isbn_ebook | 978-0-387-47101-3Series ISSN 1872-082X Series E-ISSN 2197-1854 | | issn_series | 1872-082X | | copyright | Springer-Verlag US 2010 |
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