| 書目名稱 | The Designer’s Guide to Verilog-AMS |
| 編輯 | Kenneth S. Kundert,Olaf Zinke |
| 視頻video | http://file.papertrans.cn/908/907399/907399.mp4 |
| 叢書名稱 | The Designer‘s Guide Book Series |
| 圖書封面 |  |
| 描述 | The Verilog Hardware Description Language (Verilog-HDL) has long been the most popular language for describing complex digital hardware. It started life as a prop- etary language but was donated by Cadence Design Systems to the design community to serve as the basis of an open standard. That standard was formalized in 1995 by the IEEE in standard 1364-1995. About that same time a group named Analog Verilog International formed with the intent of proposing extensions to Verilog to support analog and mixed-signal simulation. The first fruits of the labor of that group became available in 1996 when the language definition of Verilog-A was released. Verilog-A was not intended to work directly with Verilog-HDL. Rather it was a language with Similar syntax and related semantics that was intended to model analog systems and be compatible with SPICE-class circuit simulation engines. The first implementation of Verilog-A soon followed: a version from Cadence that ran on their Spectre circuit simulator. As more implementations of Verilog-A became available, the group defining the a- log and mixed-signal extensions to Verilog continued their work, releasing the defi- tion of Verilog-AMS in 20 |
| 出版日期 | Book 2004 |
| 關(guān)鍵詞 | Hardware; Signal; Verilog; analog; material; modeling; simulation |
| 版次 | 1 |
| doi | https://doi.org/10.1007/b117108 |
| isbn_softcover | 978-1-4757-8159-5 |
| isbn_ebook | 978-1-4020-8045-6 |
| copyright | Springer Science+Business Media New York 2004 |
|Archiver|手機(jī)版|小黑屋|
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