Titlebook: Reliable Software Technologies - Ada-Europe 2010; 15th Ada-Europe Inte Jorge Real,Tullio Vardanega Conference proceedings 2010 The Editor(s

ADJ

What to Make of Multicore Processors for Reliable Real-Time Systems?ability embedded real-time systems. Appealing aspects of this development include the ability to process more instructions per second and more instructions per watt. However, not all problems are amenable to parallel decomposition, and for those that are, designing a correct scalable solution can be

instructive

莎草

Dispatching Domains for Multiprocessor Platforms and Their Representation in Adalatforms it provides no explicit support. If Ada is going to be an effective language for multiprocessor real-time systems then it needs to address the mapping issue that will allow the programmer to express their requirements for task to processor affinity. A number of different mapping and schedul

平淡而無味

Implementing Multicore Real-Time Scheduling Algorithms Based on Task Splitting Using Ada 2012ications with hard real-time requirements is non-trivial. Well-known real-time scheduling algorithms in the uniprocessor context (Rate-Monotonic [1] or Earliest-Deadline-First [1]) do not perform well on multiprocessors. For this reason the scientific community in the area of real-time systems has p

Gastric

焦慮

BLANC

MERIT

Static Versioning of Global State for Race Condition Detectionome inconsistent and result in unpredictable behavior of the software. Much work has been published on analyses to identify access sites to shared data which do not conform to an accepted synchronization pattern. However, those algorithms usually cannot determine if a computation will use a consiste

BLANK

Using Hardware Support for Scheduling with Ada to handle a large number, or high rate, of external stimuli (interrupts) exacerbates the processor loading problem by compromising ideal processor behaviour through the disruption of performance enhancing features, such as of pipelines and cache memories. This paper reports on the use of Ada with a

冰河期

Cache-Aware Development of High-Integrity Systemsbehavior of applications. It is a well known fact that the adoption of hardware acceleration features such as caches may affect both the safeness and the tightness of timing analysis. In this paper we discuss how the industrial development process may gain control over the unpredictability of cache