書目名稱 | Parallel Algorithms and Architectures for DSP Applications |
編輯 | Magdy A. Bayoumi |
視頻video | http://file.papertrans.cn/741/740900/740900.mp4 |
叢書名稱 | The Springer International Series in Engineering and Computer Science |
圖書封面 |  |
描述 | Over the past few years, the demand for high speed Digital Signal Proces- sing (DSP) has increased dramatically. New applications in real-time image processing, satellite communications, radar signal processing, pattern recogni- tion, and real-time signal detection and estimation require major improvements at several levels; algorithmic, architectural, and implementation. These perfor- mance requirements can be achieved by employing parallel processing at all levels. Very Large Scale Integration (VLSI) technology supports and provides a good avenue for parallelism. Parallelism offers efficient sohitions to several problems which can arise in VLSI DSP architectures such as: 1. Intermediate data communication and routing: several DSP algorithms, such as FFT, involve excessive data routing and reordering. Parallelism is an efficient mechanism to minimize the silicon cost and speed up the pro- cessing time of the intermediate middle stages. 2. Complex DSP applications: the required computation is almost doubled. Parallelism will allow two similar channels processing at the same time. The communication between the two channels has to be minimized. 3. Applicatilm specific systems: this e |
出版日期 | Book 1991 |
關(guān)鍵詞 | Overhead; Routing; Signal; VLSI; algorithms; communication; computer; digital signal processor; fast Fourier |
版次 | 1 |
doi | https://doi.org/10.1007/978-1-4615-3996-4 |
isbn_softcover | 978-1-4613-6786-4 |
isbn_ebook | 978-1-4615-3996-4Series ISSN 0893-3405 |
issn_series | 0893-3405 |
copyright | Springer Science+Business Media New York 1991 |