Titlebook: Out-of-order Parallel Discrete Event Simulation for Electronic System-level Design; Weiwei Chen Book 2015 Springer International Publishin

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Synchronous Parallel Discrete Event Simulation,Effective Electronic System-Level (ESL) design frameworks transform and refine high-level designs into various transaction level models described in C-based System-level Description Languages (SLDLs) and rely on simulation for validation.

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Optimized Out-of-Order Parallel Discrete Event Simulation,The out-of-order parallel discrete event simulation in Chap.?. relies on static code analysis and dynamic out-of-order scheduling to break the global cycle barrier in simulation so as to achieve high multicore CPU utilization.

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Utilizing the Parallel Simulation Infrastructure,In order to utilize parallel processing for low power and high performance in embedded systems, ESL models must contain explicit and efficient parallelism.

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Conclusions,The large size and complexity of modern embedded systems poses a great challenge to design and validation. In order to address this challenge, system-level design usually starts with an abstract model of the intended system and follows different design methodologies to get the final implementation with the help of design automation tools.

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978-3-319-36107-9Springer International Publishing Switzerland 2015

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