Titlebook: On-Surface Atomic Wires and Logic Gates; Updated in 2016 Proc Marek Kolmer,Christian Joachim Conference proceedings 2017 Springer Internati

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Nanopackaging of Si(100)H Wafer for Atomic-Scale Investigations,ovides surface study at the atomic scale. However, the surface preparation is a crucial experimental step and requires a complex protocol conducted in situ in a UHV chamber. Surface contamination, atomic roughness, and defect density must be controlled in order to ensure the reliability of advanced

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Atomic Wires on Ge(001):H Surface,scribe a full protocol of formation of atomic wires on Ge(001):H-(2×1) surface. The wires are composed of bare germanium dimers possessing dangling bonds, which introduce electronic states within the Ge(001):H surface band gap. With a view to the possible applications, we present detailed analysis o

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Band Engineering of the Si(001):H Surface by Doping with P and B Atoms,Si(001):H surface patches are proposed as an alternative to metallic nano-islands or as an intermediate scale between the DB wire and the metallic islands to precisely contact a DB wire. Our calculations show that patches of B dopants incorporated in Si(001):H surface introduce states in the surface

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Electronic Properties of a Single Dangling Bond and of Dangling Bond Wires on a Si(001):H Surface,nic circuits. Therefore, it is critical to characterize the structural and electronic properties of single dangling bonds to begin to design and construct such devices. Using low-temperature scanning tunneling spectroscopy, imaging, density functional theory, and quantum transport calculations, we d

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,Complex Atomic-Scale Surface Electronic Circuit’s Simulator Including the Pads and the Supporting Ss and Au(111) metallic nano-pads contacts discussed in Chapter “.” have been investigated to go forward for reaching compact and complex Boolean logic gates systems. The atomic wire electronic band gap, the tunneling intensity decay problems with the length of those atomic-scale interconnects and th