書目名稱 | On-Chip Training NPU - Algorithm, Architecture and SoC Design | 編輯 | Donghyeon Han,Hoi-Jun Yoo | 視頻video | http://file.papertrans.cn/702/701322/701322.mp4 | 概述 | Focuses on the requirements and challenges of on-device deep neural network (DNN) training, rather than DNN inference.Provides guidelines for on-device, DNN training semiconductor or system-on-chip (S | 圖書封面 |  | 描述 | .Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.. | 出版日期 | Book 2023 | 關(guān)鍵詞 | AI Semiconductor; AI SoC; Artificial intelligence; Deep neural network; On-device DNN training | 版次 | 1 | doi | https://doi.org/10.1007/978-3-031-34237-0 | isbn_softcover | 978-3-031-34239-4 | isbn_ebook | 978-3-031-34237-0 | copyright | The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerl |
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