Titlebook: Non-logic Devices in Logic Processes; Yanjun Ma,Edwin Kan Book 2017 Springer International Publishing AG 2017 Device Physics.Logic CMOS.MO

relapse

書目名稱Non-logic Devices in Logic Processes影響因子(影響力)




書目名稱Non-logic Devices in Logic Processes影響因子(影響力)學(xué)科排名




書目名稱Non-logic Devices in Logic Processes網(wǎng)絡(luò)公開度




書目名稱Non-logic Devices in Logic Processes網(wǎng)絡(luò)公開度學(xué)科排名




書目名稱Non-logic Devices in Logic Processes被引頻次




書目名稱Non-logic Devices in Logic Processes被引頻次學(xué)科排名




書目名稱Non-logic Devices in Logic Processes年度引用




書目名稱Non-logic Devices in Logic Processes年度引用學(xué)科排名




書目名稱Non-logic Devices in Logic Processes讀者反饋




書目名稱Non-logic Devices in Logic Processes讀者反饋學(xué)科排名

賭博

倒轉(zhuǎn)

Yanjun Ma,Edwin Kanw of the large amount of data available some of the information is given on the CD ROM only. Parameters for low-lying nuclear levels of many nuclei were previously published by Landolt-B?rnstein in Volume I/18, and for nuclear unbound states in Volumes I/16 and I/19A..978-3-540-33961-8Series ISSN 1615-1844 Series E-ISSN 1616-9522

Flirtatious

http://image.papertrans.cn/n/image/667125.jpg

并排上下

https://doi.org/10.1007/978-3-319-48339-9Device Physics; Logic CMOS; MOSFETs; Semiconductor Device Physics; Semiconductor Devices; Semiconductor F

庇護(hù)

Bipolar Transistors in Logic CMOS Processestensively discussed, mostly in the context of avoiding the latch-up risk for CMOS ICs. We here focus on a couple of applications, especially in the voltage reference circuits, of the BJTs. We also discuss a special punchthrough transistor that can be obtained from the CMOS process.

ODIUM

Diodes in Logic CMOS Processesive, the polysilicon resistor. In particular, the different temperature coefficients of resistivity (TCR) of p and n polysilicon make it possible to obtain a resistor that is temperature independent. Then we showed several examples of making Schottky diodes in logic processes and discussed their properties and applications.

MIRE

Logic Nonvolatile Memoryive an overview of the embedded NVM design using logic CMOS process. We review the basic memory cell design, the programming and erasing methods, and array structure of embedded NVMs. High-voltage circuits, including charge pumps and high-voltage switches, are also discussed. Reliability issues associated with embedded NVMs are introduced.

發(fā)展

Fissure

978-3-319-83916-5Springer International Publishing AG 2017