Titlebook: Noise-Shaping All-Digital Phase-Locked Loops; Modeling, Simulation Francesco Brandonisio,Michael Peter Kennedy Book 2014 Springer Internati

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978-3-319-34441-6Springer International Publishing Switzerland 2014

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Analog Circuits and Signal Processinghttp://image.papertrans.cn/n/image/666802.jpg

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https://doi.org/10.1007/978-3-319-03659-5All-Digital Phase-Locked Loops; Analog Circuits and Signal Processing; Modeling All-Digital Phase-Lock

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Francesco Brandonisio,Michael Peter KennedyDiscusses in detail a wide range of all-digital phase-locked loops architectures.Presents a unified framework in which to model time-to-digital converters for ADPLLs.Explains a procedure to predict an

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A Unifying Framework for TDC Architectures,A TDC is an analog-to-digital converter that converts the duration of a time interval to a digital word [.].

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Analytical Predictions of Phase Noise in ADPLLs,In this chapter, we will derive analytical predictions of the phase noise in TDC-based and accumulator-based ADPLLs with .th-order noise shaping TDCs and DCO driven by a sigma-delta modulator.

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Efficient Modeling and Simulation of Accumulator-Based ADPLLs,In this chapter, we focus on the behavioral modeling and simulation of accumulator-based ADPLLs. First, we introduce some basic concepts related to mixed-signal systems and simulators. We highlight the major issues for the simulation of an ADPLL as an example mixed-signal system.

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