Titlebook: Networks on Chip; Axel Jantsch,Hannu Tenhunen Book 2003 Springer Science+Business Media New York 2003 VLSI.architecture.computer.computer

灰塵

書目名稱Networks on Chip影響因子(影響力)




書目名稱Networks on Chip影響因子(影響力)學(xué)科排名




書目名稱Networks on Chip網(wǎng)絡(luò)公開(kāi)度




書目名稱Networks on Chip網(wǎng)絡(luò)公開(kāi)度學(xué)科排名




書目名稱Networks on Chip被引頻次




書目名稱Networks on Chip被引頻次學(xué)科排名




書目名稱Networks on Chip年度引用




書目名稱Networks on Chip年度引用學(xué)科排名




書目名稱Networks on Chip讀者反饋




書目名稱Networks on Chip讀者反饋學(xué)科排名

空氣傳播

http://image.papertrans.cn/n/image/663012.jpg

Pigeon

Metamorphosis

Multi-Level Software Validation for NoCThis chapter presents a problem in conventional methods of validating software design for NoC: software validation at different abstraction levels. As a solution to resolve the problem, a method of multi-level software validation is explained.

1FAWN

A Design Methodology for NOC-Based Systemshitecture. The NOC backbone encapsulates the physical integration problems into communication solution for system architect. The NOC platform provides application area optimized computation and storage resources for system developers. Essential parts of the methodology are decision-support methods for both NOC platform and NOC system designers.

土產(chǎn)

Guaranteeing the Quality of Services in Networks on Chip guaranteed and best-effort (no commitment) services combines their respective attractive features: predictable behaviour, and good average resource utilisation. The . NOC is an example of this approach, and forms the basis of a QoS-based design style, as advocated in this chapter.

Mirage

Popcorn

CLAIM

On Packet Switched Networks for On-Chip Communicationtch design, design of network access by cores and communication protocols. A particular protocol stack, called Nostrum, is described as a case study of protocols for on-chip communication. Ideas and tools can be borrowed from computer networks for evaluating on-chip networks.

群居動(dòng)物

Clocking Strategies for Networks-on-Chiproposed over the years and are suitable for the NoC scheme as well as presenting a new and clever way of distributing a Quasi-synchronous, i.e., a perfectly synchronous, but not skew-less, clock across an entire NoC-chip.