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Titlebook: NANO-CHIPS 2030; On-Chip AI for an Ef Boris Murmann,Bernd Hoefflinger Book 2020 Springer Nature Switzerland AG 2020 Nano-Electronics.Artifi

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發(fā)表于 2025-3-21 19:49:36 | 只看該作者 |倒序瀏覽 |閱讀模式
書目名稱NANO-CHIPS 2030
副標題On-Chip AI for an Ef
編輯Boris Murmann,Bernd Hoefflinger
視頻videohttp://file.papertrans.cn/661/660020/660020.mp4
概述Presents key elements of a new epoch in nanoelectronics that follows the end of the Nanometer Roadmap.A timely compendium that will inspire and shape the future of nanoelectronics.Explores the next ge
叢書名稱The Frontiers Collection
圖書封面Titlebook: NANO-CHIPS 2030; On-Chip AI for an Ef Boris Murmann,Bernd Hoefflinger Book 2020 Springer Nature Switzerland AG 2020 Nano-Electronics.Artifi
描述In this book, a global team of experts from academia, research institutes and industry presents their vision on how new nano-chip architectures will enable the performance and energy efficiency needed for AI-driven advancements in autonomous mobility, healthcare, and man-machine cooperation. Recent reviews of the status quo, as presented in CHIPS 2020 (Springer), have prompted the need for an urgent reassessment of opportunities in nanoelectronic information technology. As such, this book explores the foundations of a new era in nanoelectronics that will drive progress in intelligent chip systems for energy-efficient information technology, on-chip deep learning for data analytics, and quantum computing. Given its scope, this book provides a timely compendium that hopes to inspire and shape the future of nanoelectronics in the decades to come.?
出版日期Book 2020
關鍵詞Nano-Electronics; Artificial Intelligence; CMOS Chips; Energy Efficiency; 3D Integration; Acquisition of
版次1
doihttps://doi.org/10.1007/978-3-030-18338-7
isbn_softcover978-3-030-18340-0
isbn_ebook978-3-030-18338-7Series ISSN 1612-3018 Series E-ISSN 2197-6619
issn_series 1612-3018
copyrightSpringer Nature Switzerland AG 2020
The information of publication is updating

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發(fā)表于 2025-3-22 00:17:39 | 只看該作者
Dennis Rich,Andrew Bartolo,Carlo Gilardo,Binh Le,Haitong Li,Rebecca Park,Robert M. Radway,Mohamed M.
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發(fā)表于 2025-3-22 01:15:08 | 只看該作者
Dealing with the Energy Versus Performance Tradeoff in Future CMOS Digital Circuit Design, never fully gone. Careful library design, optimal choice of supply voltages, plural and advanced architectural techniques to deal with timing variability impose themselves. In this chapter an overview of this scenery is given.
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發(fā)表于 2025-3-22 06:10:15 | 只看該作者
Enabling Domain-Specific Architectures with Programmable Devices,-level processing using CGRA (Coarse Grained Reconfigurable Architecture) is integrated on the same platform. Looking forward, we anticipate that the rising cost of building monolithic devices will also set a disaggregation trend towards using multiple dies. Building systems in the package will prov
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Heterogeneous 3D Nano-systems: The N3XT Approach?,new transistor and memory technologies, new integration approaches, and new architectures for computation immersed in memory. Nanosystems with such massive benefits are essential for enabling new frontiers of applications across a wide range of domains, from highly energy-constrained and deeply-embedded computing systems all the way to the cloud.
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Digital Neural Network Accelerators, The focus of this chapter is on the inference phase of Deep Neural Networks which are used in many applications today. Their performance will be compared to multi-core-chips, graphics processing units, and field-programmable gate arrays. Based on current applications future requirements for digital accelerator chips will be outlined.
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發(fā)表于 2025-3-23 03:07:42 | 只看該作者
High-Performance Computing Trends,× improvements in energy efficiency and in throughput in the new decade, in order to limit and to manage the data explosion in the INTERNET and in the expected autonomous mobile world. The potential INTERNET energy crisis has been updated in 2018 to a required electric power of 928 GW in 2030, 21% of the expected total global need.
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