| 書目名稱 | Multi-Net Optimization of VLSI Interconnect |
| 編輯 | Konstantin Moiseev,Avinoam Kolodny,Shmuel Wimer |
| 視頻video | http://file.papertrans.cn/640/639983/639983.mp4 |
| 概述 | Describes the evolution of interconnect scaling and provides new techniques for layout migration and optimization, focusing on multi-net optimization.Presents research results that provide a level of |
| 圖書封面 |  |
| 描述 | .This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.. |
| 出版日期 | Book 2015 |
| 關鍵詞 | Embedded Systems; Interconnect optimization; Interconnect scalability; Interconnection networks; Multi-N |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-1-4614-0821-5 |
| isbn_softcover | 978-1-4939-4262-6 |
| isbn_ebook | 978-1-4614-0821-5 |
| copyright | Springer Science+Business Media New York 2015 |
|Archiver|手機版|小黑屋|
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