| 書目名稱 | Morphological Image Processing: Architecture and VLSI design |
| 編輯 | Petrus Paulus Jonker |
| 視頻video | http://file.papertrans.cn/640/639398/639398.mp4 |
| 圖書封面 |  |
| 描述 | Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real- time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three. |
| 出版日期 | Book 1992 |
| 關鍵詞 | 3D; CMOS; Hardware; Signal; VLSI; algorithm; algorithms; computer; computer architecture; digital signal proc |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-1-4615-2804-3 |
| isbn_softcover | 978-90-201-2766-9 |
| isbn_ebook | 978-1-4615-2804-3 |
| copyright | Springer Science+Business Media Dordrecht 1992 |
|Archiver|手機版|小黑屋|
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