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Titlebook: Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures; Umit Y. Ogras,Radu Marculescu Book 2013 Springer Scien

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書(shū)目名稱Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
編輯Umit Y. Ogras,Radu Marculescu
視頻videohttp://file.papertrans.cn/637/636276/636276.mp4
概述Presented is a mathematical model for on-chip routers and use this model for NoC performance analysis.Our performance analysis approach can be used not only to obtain fast and accurate performance est
叢書(shū)名稱Lecture Notes in Electrical Engineering
圖書(shū)封面Titlebook: Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures;  Umit Y. Ogras,Radu Marculescu Book 2013 Springer Scien
描述.Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures...In this dissertation, we study outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs..
出版日期Book 2013
關(guān)鍵詞Analysis; Communication Architectures; Modeling; Network-on-Chip; Optimization
版次1
doihttps://doi.org/10.1007/978-94-007-3958-1
isbn_softcover978-94-007-9865-6
isbn_ebook978-94-007-3958-1Series ISSN 1876-1100 Series E-ISSN 1876-1119
issn_series 1876-1100
copyrightSpringer Science+Business Media New York 2013
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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
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978-94-007-9865-6Springer Science+Business Media New York 2013
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Umit Y. Ogras,Radu MarculescuPresented is a mathematical model for on-chip routers and use this model for NoC performance analysis.Our performance analysis approach can be used not only to obtain fast and accurate performance est
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1876-1100 be used not only to obtain fast and accurate performance est.Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the commu
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