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Titlebook: Massive MIMO Detection Algorithm and VLSI Architecture; Leibo Liu,Guiqiang Peng,Shaojun Wei Book 2019 Springer Nature Singapore Pte Ltd. a

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發(fā)表于 2025-3-21 16:34:14 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
書目名稱Massive MIMO Detection Algorithm and VLSI Architecture
編輯Leibo Liu,Guiqiang Peng,Shaojun Wei
視頻videohttp://file.papertrans.cn/626/625356/625356.mp4
概述Present a dynamic and reconfigurable architecture for future wireless communication systems, e.g. 5G and beyond.Introduces massive multiple-input multiple-output (MIMO) technology, which can improve n
圖書封面Titlebook: Massive MIMO Detection Algorithm and VLSI Architecture;  Leibo Liu,Guiqiang Peng,Shaojun Wei Book 2019 Springer Nature Singapore Pte Ltd. a
描述.This book introduces readers to a reconfigurable chip architecture for future wireless communication systems, such as 5G and beyond. The proposed architecture perfectly meets the demands for future mobile communication solutions to support different standards, algorithms, and antenna sizes, and to accommodate the evolution of standards and algorithms. It employs massive MIMO detection algorithms, which combine the advantages of low complexity and high parallelism, and can fully meet the requirements for detection accuracy. Further, the architecture is implemented using ASIC, which offers high energy efficiency, high area efficiency and low detection error...After introducing massive MIMO detection algorithms and circuit architectures, the book describes the ASIC implementation for verifying the massive MIMO detection. In turn, it provides detailed information on the proposed reconfigurable architecture: the data path and configuration path for massive MIMO detection algorithms, including the processing unit, interconnections, storage mechanism, configuration information format, and configuration method.?.
出版日期Book 2019
關(guān)鍵詞Chip Architecture; Wireless Network; 5G; Massive MIMO Detection; VLSI; ASIC; Dynamic Reconfigurable; inform
版次1
doihttps://doi.org/10.1007/978-981-13-6362-7
isbn_softcover978-981-13-6364-1
isbn_ebook978-981-13-6362-7
copyrightSpringer Nature Singapore Pte Ltd. and Science Press, Beijing, China 2019
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發(fā)表于 2025-3-21 20:21:04 | 只看該作者
Architecture of Linear Massive MIMO Detection,e optimization problems in the chip design, including how to improve the throughput of chip, and how to reduce the power consumption and area of chip. Finally, the parameters of the designed chip are compared with those of the existing linear detection algorithms, and then the comprehensive comparison results are obtained.
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Architecture of Linear Massive MIMO Detection, affect the efficiency of signal detection. In Chap.?., we have introduced four typical iteration algorithms of massive MIMO linear detection, and illustrate their advantages by comparing them with some existing linear detection algorithms. This chapter describes how to implement the four algorithms
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Dynamic Reconfigurable Chips for Massive MIMO Detection,etection algorithm and model analysis and the reconfigurable signal detection and processing architecture design. The analysis of the signal detection algorithm mainly involves the behavior pattern analysis and parallelism of the mainstream signal detection algorithm the operator extraction and the
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