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Titlebook: Low-Complexity Arithmetic Circuit Design in Carbon Nanotube Field Effect Transistor Technology; K. Sridharan,B. Srinivasu,Vikramkumar Pudi

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樓主
發(fā)表于 2025-3-21 19:50:50 | 只看該作者 |倒序瀏覽 |閱讀模式
書目名稱Low-Complexity Arithmetic Circuit Design in Carbon Nanotube Field Effect Transistor Technology
編輯K. Sridharan,B. Srinivasu,Vikramkumar Pudi
視頻videohttp://file.papertrans.cn/589/588841/588841.mp4
概述Discusses content beyond design of single-digit adders in CNTFET.Proposes a general methodology for synthesis of ternary logic-based circuits.Includes extensive programs to supports the theory develop
叢書名稱Carbon Nanostructures
圖書封面Titlebook: Low-Complexity Arithmetic Circuit Design in Carbon Nanotube Field Effect Transistor Technology;  K. Sridharan,B. Srinivasu,Vikramkumar Pudi
描述This book introduces readers to the emerging carbon nanotube field-effect transistor (CNTFET) technology, and examines the problem of designing efficient arithmetic circuits in CNTFET technology. Observing that CNTFETs make it possible to achieve two distinct threshold voltages merely by altering the diameter of the carbon nanotube used, the book begins by discussing the design of basic ternary logic elements. It then examines efficient CNTFET-based design of single and multiple ternary digit adders by judicious choice of unary operators in ternary logic, as well as the design of a ternary multiplier in CNTFET technology, and presents detailed simulation results in HSPICE. Lastly, the book outlines a procedure for automating the synthesis process and provides sample code in Python.?.
出版日期Book 2020
關(guān)鍵詞Carbon Nanotube Field Effect Transistor,; Adder and Subtractor Designs; Multiplier Design; Ternary Logi
版次1
doihttps://doi.org/10.1007/978-3-030-50699-5
isbn_softcover978-3-030-50701-5
isbn_ebook978-3-030-50699-5Series ISSN 2191-3005 Series E-ISSN 2191-3013
issn_series 2191-3005
copyrightSpringer Nature Switzerland AG 2020
The information of publication is updating

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沙發(fā)
發(fā)表于 2025-3-21 22:50:08 | 只看該作者
Low-Complexity Arithmetic Circuit Design in Carbon Nanotube Field Effect Transistor Technology978-3-030-50699-5Series ISSN 2191-3005 Series E-ISSN 2191-3013
板凳
發(fā)表于 2025-3-22 03:07:31 | 只看該作者
Automating the Synthesis Process,ules” for reducing the transistor count. In this chapter, we attempt to answer the following question: . We provide an outline of an automatic synthesis procedure and also touch upon coding in Python. A study of the synthesis problem is also pursued in [.].
地板
發(fā)表于 2025-3-22 07:36:54 | 只看該作者
The Road Ahead,ic circuits in Carbon Nanotube Field Effect Transistor technology. We have presented a number of theoretical results on ternary logic. The results facilitate reduction of transistor count for various circuits. We now list the contributions and touch upon extensions to the work.
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發(fā)表于 2025-3-22 12:30:10 | 只看該作者
https://doi.org/10.1007/978-3-030-50699-5Carbon Nanotube Field Effect Transistor,; Adder and Subtractor Designs; Multiplier Design; Ternary Logi
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