| 書目名稱 | Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications | | 編輯 | Gaurav Singh,Sandeep K. Shukla | | 視頻video | http://file.papertrans.cn/589/588798/588798.mp4 | | 概述 | Presents detailed analysis of various power optimization problems associated with high-level synthesis, as well as novel techniques for reducing power consumption of hardware designs at higher level o | | 圖書封面 |  | | 描述 | Human lives are getting increasingly entangled with technology, especially comp- ing and electronics. At each step we take, especially in a developing world, we are dependent on various gadgets such as cell phones, handheld PDAs, netbooks, me- cal prosthetic devices, and medical measurement devices (e.g., blood pressure m- itors, glucometers). Two important design constraints for such consumer electronics are their form factor and battery life. This translates to the requirements of reduction in the die area and reduced power consumption for the semiconductor chips that go inside these gadgets. Performance is also important, as increasingly sophisticated applications run on these devices, and many of them require fast response time. The form factor of such electronics goods depends not only on the overall area of the chips inside them but also on the packaging, which depends on thermal ch- acteristics. Thermal characteristics in turn depend on peak power signature of the chips. As a result, while the overall energy usage reduction increases battery life, peak power reduction in?uences the form factor. One more important aspect of these electronic equipments is that every 6 months o | | 出版日期 | Book 2010 | | 關(guān)鍵詞 | CAOS; Circuit Design; Concurrent Action-Oriented Specifications; Embedded Systems; Formal Verification; H | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4419-6481-6 | | isbn_softcover | 978-1-4899-8702-0 | | isbn_ebook | 978-1-4419-6481-6 | | copyright | Springer Science+Business Media, LLC 2010 |
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