| 書(shū)目名稱 | Logic Synthesis for Low Power VLSI Designs | | 編輯 | Sasan Iman,Massoud Pedram | | 視頻video | http://file.papertrans.cn/588/587943/587943.mp4 | | 圖書(shū)封面 |  | | 描述 | .Logic Synthesis for Low Power VLSI Designs. presents asystematic and comprehensive treatment of power modeling andoptimization at the logic level. More precisely, this book provides adetailed presentation of methodologies, algorithms and CAD tools forpower modeling, estimation and analysis, synthesis and optimization atthe logic level. .Logic Synthesis for Low Power VLSI Designs.contains detailed descriptions of technology-dependent logictransformations and optimizations, technology decomposition andmapping, and post-mapping structural optimization techniques for lowpower. It also emphasizes the trade-off techniques for two-level andmulti-level logic circuits that involve power dissipation and circuitspeed, in the hope that the readers can better understand the issuesand ways of achieving their power dissipation goal while meeting thetiming constraints. ..Logic Synthesis for Low Power VLSI Designs. is written for VLSIdesign engineers, CAD professionals, and students who have had a basicknowledge of CMOS digital design and logic synthesis. | | 出版日期 | Book 1998 | | 關(guān)鍵詞 | CMOS; VLSI; algorithms; circuit; computer-aided design (CAD); digital design; logic; modeling; network; optim | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4615-5453-0 | | isbn_softcover | 978-1-4613-7490-9 | | isbn_ebook | 978-1-4615-5453-0 | | copyright | Springer Science+Business Media New York 1998 |
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