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Titlebook: Logic Synthesis for Finite State Machines Based on Linear Chains of States; Foundations, Recent Alexander Barkalov,Larysa Titarenko,Jacek

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發(fā)表于 2025-3-21 16:11:50 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
書目名稱Logic Synthesis for Finite State Machines Based on Linear Chains of States
副標(biāo)題Foundations, Recent
編輯Alexander Barkalov,Larysa Titarenko,Jacek Bieganow
視頻videohttp://file.papertrans.cn/588/587941/587941.mp4
概述Presents original synthesis and optimization methods taking into account the peculiarities of a control algorithm and finite state machine (FSM) model in use.Discusses the hardware implementation of c
叢書名稱Studies in Systems, Decision and Control
圖書封面Titlebook: Logic Synthesis for Finite State Machines Based on Linear Chains of States; Foundations, Recent  Alexander Barkalov,Larysa Titarenko,Jacek
描述.This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation..This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units.
出版日期Book 2018
關(guān)鍵詞Linear Chains of States; Finite State Machine; Logic Synthesis; Field-Programmable Gate Arrays; Look-up
版次1
doihttps://doi.org/10.1007/978-3-319-59837-6
isbn_softcover978-3-319-86714-4
isbn_ebook978-3-319-59837-6Series ISSN 2198-4182 Series E-ISSN 2198-4190
issn_series 2198-4182
copyrightSpringer International Publishing AG 2018
The information of publication is updating

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Hardware Reduction for Moore XFSMs,imal state assignment or transformation of state codes. The third part deals with the models based on the encoding of the chain outputs. At last, the principle of code sharing is discussed. In this case, the state code is represented as a concatenation of the code of class of pseudoequivalent chains and the code of element inside this class.
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Finite State Machines and Field-Programmable Gate Arrays,. Next, the basic problems of FSM design are considered. Different state assignment methods are analyzed, as well as the methods of functional decomposition. Next the issues are discussed connected with implementing FSM logic circuits with EMBs. The peculiarities of hybrid FPGAs are discussed last part of the Chapter.
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Hardware Reduction for Moore EFSMs,the principle of code sharing. In this case, the state code is represented as a concatenation of the chain code and the code of component inside this chain. The last part of the chapter is devoted to design methods targeting the hybrid FPGAs.
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