| 書目名稱 | Logic Synthesis for Field-Programmable Gate Arrays |
| 編輯 | Rajeev Murgai,Robert K. Brayton,Alberto Sangiovann |
| 視頻video | http://file.papertrans.cn/588/587940/587940.mp4 |
| 叢書名稱 | The Springer International Series in Engineering and Computer Science |
| 圖書封面 |  |
| 描述 | Short turnaround has become critical in the design ofelectronic systems. Software- programmable components such asmicroprocessors and digital signal processors have been usedextensively in such systems since they allow rapid design revisions.However, the inherent performance limitations of software-programmablesystems mean that they are inadequate for high-performance designs.Designers thus turned to gate arrays as a solution. User-programmablegate arrays (field-programmable gate arrays, FPGAs) have recentlyemerged and are changing the way electronic systems are designed andimplemented. The growing complexity of the logic circuits that can bepacked onto an FPGA chip means that it has become important to haveautomatic synthesis tools that implement logic functions on thesearchitectures. .Logic Synthesis for Field-Programmable GateArrays. describes logic synthesis for both look-up table (LUT) andmultiplexor-based architectures, with a balanced presentation ofexisting techniques together with algorithms and the system developedby the authors. ..Audience:. A useful reference for VLSI designers, developers ofcomputer-aided design tools, and anyone involved in or with FPGAs.. |
| 出版日期 | Book 1995 |
| 關(guān)鍵詞 | FPGA; Field Programmable Gate Array; Signal; Software; VLSI; algorithms; architecture; complexity; computer; |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-1-4615-2345-1 |
| isbn_softcover | 978-1-4613-5994-4 |
| isbn_ebook | 978-1-4615-2345-1Series ISSN 0893-3405 |
| issn_series | 0893-3405 |
| copyright | Springer Science+Business Media New York 1995 |
|Archiver|手機(jī)版|小黑屋|
派博傳思國際
( 京公網(wǎng)安備110108008328)
GMT+8, 2025-10-7 17:52
發(fā)表于 2025-3-21 19:41:21
