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Titlebook: Logic Programming ‘85; Proceedings of the 4 Eiiti Wada Conference proceedings 1986 Springer-Verlag Berlin Heidelberg 1986 Compiler.Constrai

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發(fā)表于 2025-3-21 20:01:42 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
書目名稱Logic Programming ‘85
副標(biāo)題Proceedings of the 4
編輯Eiiti Wada
視頻videohttp://file.papertrans.cn/588/587898/587898.mp4
叢書名稱Lecture Notes in Computer Science
圖書封面Titlebook: Logic Programming ‘85; Proceedings of the 4 Eiiti Wada Conference proceedings 1986 Springer-Verlag Berlin Heidelberg 1986 Compiler.Constrai
出版日期Conference proceedings 1986
關(guān)鍵詞Compiler; Constraint; Debugging; Parser; Prolog; algorithms; communication; heuristics; knowledge; knowledge
版次1
doihttps://doi.org/10.1007/3-540-16479-0
isbn_softcover978-3-540-16479-1
isbn_ebook978-3-540-39820-2Series ISSN 0302-9743 Series E-ISSN 1611-3349
issn_series 0302-9743
copyrightSpringer-Verlag Berlin Heidelberg 1986
The information of publication is updating

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沙發(fā)
發(fā)表于 2025-3-21 23:42:47 | 只看該作者
And-or queuing in Extended Concurrent Prolog, the OR-related clauses are enqueued. This scheduling method is designated “AND-OR queuing.” AND-OR queuing makes it possible to handle all kinds of AND-relations and OR-relations in a uniform manner.
板凳
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地板
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5#
發(fā)表于 2025-3-22 11:52:38 | 只看該作者
Parallel Prolog machine PARK: Its hardware structure and prolog system,parallel AND constructor for AND parallelism and a mode declaration for OR parallelism. The communication among processes is performed with a special built-in predicate through a communication channel.
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發(fā)表于 2025-3-23 01:14:35 | 只看該作者
Hardware simulator of Reduction-Based Parallel Inference Machine PIM-R, operate as the inference modules and the network, respectively. In order to realize high simulation rate, an event-driven method is introduced. ”Queens” program and ”Quicksort” program were executed on the simulator. The results show that a PIM-R architecture can effectivity utilize the parallelism
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發(fā)表于 2025-3-23 08:26:00 | 只看該作者
Parallel Prolog machine PARK: Its hardware structure and prolog system,lled PARK-Prolog, which will be implemented on this machine. PARK is a multi-microprocessor machine connected with a common bus. PARK is divided into one host processor and several (currently 3) slave processors. Each processor is composed of a 16 bit microprocessor (Motorola MC68000), a local memor
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