Titlebook: Languages and Compilers for Parallel Computing; 15th Workshop, LCPC Bill Pugh,Chau-Wen Tseng Conference proceedings 2005 Springer-Verlag B

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Compiler Analysis and Supports for Leakage Power Reduction on Microprocessors,consideration of pipelines of architectures. We also give the equation for the compiler to decide if the employment of the power gating instructions on given program blocks will benefit the total energy reductions. As the duration of power gating on components on given program routines is related to

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Combining Performance Aspects of Irregular Gauss-Seidel Via Sparse Tiling,s. The latter employ only parallelism and intra-iteration locality. Our results support the premise that better performance occurs when all three performance aspects (parallelism, intra-iteration, and inter-iteration data locality) are combined.

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A Hybrid Strategy Based on Data Distribution and Migration for Optimizing Memory Locality,rion based on the number of compile-time analyzable references in loops..To test the effectiveness of our strategy in optimizing memory locality of applications, we implemented it and compared its performance with that of several other techniques such as compiler-directed data distribution and OS-di

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An Empirical Study on the Granularity of Pointer Analysis in C Programs,sets for indirect references at runtime. The collected target sets are then fed back to the ORC compiler to evaluate the effectiveness of different granularity in pointer analyses. The change of the alias queries in the compiler analyses and the change of performance of the output code at different

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