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Titlebook: Introduction to IDDQ Testing; Sreejit Chakravarty,Paul J. Thadikaran Book 1997 Springer Science+Business Media New York 1997 LSI.VLSI.circ

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書目名稱Introduction to IDDQ Testing
編輯Sreejit Chakravarty,Paul J. Thadikaran
視頻videohttp://file.papertrans.cn/474/473768/473768.mp4
叢書名稱Frontiers in Electronic Testing
圖書封面Titlebook: Introduction to IDDQ Testing;  Sreejit Chakravarty,Paul J. Thadikaran Book 1997 Springer Science+Business Media New York 1997 LSI.VLSI.circ
描述Testing techniques for VLSI circuits are undergoing manyexciting changes. The predominant method for testing digital circuitsconsists of applying a set of input stimuli to the IC and monitoringthe logic levels at primary outputs. If, for one or more inputs, thereis a discrepancy between the observed output and the expected outputthen the IC is declared to be defective. .A new approach to testing digital circuits, which has come to be knownas I.DDQ. testing, has been actively researched for the lastfifteen years. In I.DDQ. testing, the steady state supplycurrent, rather than the logic levels at the primary outputs, ismonitored. Years of research suggests that I.DDQ. testing cansignificantly improve the quality and reliability of fabricatedcircuits. This has prompted many semiconductor manufacturers to adoptthis testing technique, among them Philips Semiconductors, FordMicroelectronics, Intel, Texas Instruments, LSI Logic,Hewlett-Packard, SUN microsystems, Alcatel, and SGS Thomson. .This increase in the use of I.DDQ. testing should be of interestto three groups of individuals associated with the IC business:Product Managers and Test Engineers, CAD Tool Vendors and CircuitDesigners. .
出版日期Book 1997
關(guān)鍵詞LSI; VLSI; circuit design; computer-aided design (CAD); diagnosis; integrated circuit; logic; microsystems
版次1
doihttps://doi.org/10.1007/978-1-4615-6137-8
isbn_softcover978-1-4613-7812-9
isbn_ebook978-1-4615-6137-8Series ISSN 0929-1296
issn_series 0929-1296
copyrightSpringer Science+Business Media New York 1997
The information of publication is updating

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Computing ,, Tests,ult coverage is better; and undetectable faults can be identified. In addition to fault coverage, . is another measure used to specify the quality of test sets. Fault efficiency is the percentage of all target faults that are either detected by the test set or proved to be undetectable by the direct method.
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Putting ,, Testing To Work,Having seen the benefits of .. testing we start answering the following questions which arise in the context of setting up the .. test environment.
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Test Suites, Fault Models, Test Sets and Defects,In Chapter 4 we saw that defects change the .. level, the static logic behavior and the dynamic logic behavior of circuits. We henceforth refer to logic testing to detect faulty static logic behavior as . and logic testing to detect faulty dynamic logic behavior as ..
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