| 書目名稱 | IP Cores Design from Specifications to Production | | 副標題 | Modeling, Verificati | | 編輯 | Khaled Salah Mohamed | | 視頻video | http://file.papertrans.cn/461/460310/460310.mp4 | | 概述 | Discusses the entire life cycle process of IP cores, from specification to production, including IP modeling, verification, optimization, and protection.Describes a new verification methodology called | | 叢書名稱 | Analog Circuits and Signal Processing | | 圖書封面 |  | | 描述 | .This book describes the life cycle process of IP cores, from specification to production, including IP modeling, verification, optimization, and protection. Various trade-offs in the design process are discussed, including? those associated with many of the most common memory cores, controller IPs? and system-on-chip (SoC) buses. Readers will also benefit from the author’s practical coverage of new verification methodologies. such as bug localization, UVM, and scan-chain.? A SoC case study is presented to compare traditional verification with the new verification methodologies..Discusses the entire life cycle process of IP cores, from specification to production, including IP modeling, verification, optimization, and protection; .Introduce a deep introduction for Verilog for both implementation and verification point of view.? .Demonstrates how to use IP in applications such as memory controllers and SoC buses..Describes a new verification methodology called bug localization;.Presents a novel scan-chain methodology for RTL debugging;.Enables readers to employ UVM methodology in straightforward, practical terms.. | | 出版日期 | Book 2016 | | 關鍵詞 | IP Cores Design; IP lifecycle; IP-Based Design; Modern VLSI Design; RTL debugging; SoC Verification; UVM m | | 版次 | 1 | | doi | https://doi.org/10.1007/978-3-319-22035-2 | | isbn_softcover | 978-3-319-37358-4 | | isbn_ebook | 978-3-319-22035-2Series ISSN 1872-082X Series E-ISSN 2197-1854 | | issn_series | 1872-082X | | copyright | Springer International Publishing Switzerland 2016 |
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