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Titlebook: High-Speed CMOS Circuits for Optical Receivers; Jafar Savoj,Behzad Razavi Book 2001 Springer Science+Business Media New York 2001 CMOS.Sta

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書(shū)目名稱High-Speed CMOS Circuits for Optical Receivers
編輯Jafar Savoj,Behzad Razavi
視頻videohttp://file.papertrans.cn/427/426827/426827.mp4
圖書(shū)封面Titlebook: High-Speed CMOS Circuits for Optical Receivers;  Jafar Savoj,Behzad Razavi Book 2001 Springer Science+Business Media New York 2001 CMOS.Sta
描述With the exponential growth of the number of Internet nodes, the volume of the data transported on the backbone has increased with the same trend. The load of the global Internet backbone will soon increase to tens of terabits per second. This indicates that the backbone bandwidth requirements will increase by a factor of 50 to 100 every seven years. Transportation of such high volumes of data requires suitable media with low loss and high bandwidth. Among the available transmission media, optical fibers achieve the best performance in terms of loss and bandwidth. High-speed data can be transported over hundreds of kilometers of single-mode fiber without significant loss in signal integrity. These fibers progressively benefit from reduction of cost and improvement of perf- mance. Meanwhile, the electronic interfaces used in an optical network are not capable of exploiting the ultimate bandwidth of the fiber, limiting the throughput of the network. Different solutions at both the system and the circuit levels have been proposed to increase the data rate of the backbone. System-level solutions are based on the utilization of wave-division multiplexing (WDM), using different colors of
出版日期Book 2001
關(guān)鍵詞CMOS; Standard; VLSI; communication; electronic circuit; tables
版次1
doihttps://doi.org/10.1007/b117321
isbn_softcover978-1-4757-7449-8
isbn_ebook978-0-306-47576-4
copyrightSpringer Science+Business Media New York 2001
The information of publication is updating

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A 10-Gb/s CMOS CDR Circuit with Wide Capture Range,ing an rms jitter of 0.8 ps, this circuit is the first CMOS CDR circuit to meet the jitter generation requirements defined by SONET. The power consumption of this circuit is much smaller than the power consumption of similar circuits fabricated in bipolar or GaAs processes.
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978-1-4757-7449-8Springer Science+Business Media New York 2001
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