| 書目名稱 | High-Level Synthesis for Real-Time Digital Signal Processing | | 編輯 | Jan Vanhoof,Karl Rompaey,Hugo Man | | 視頻video | http://file.papertrans.cn/427/426625/426625.mp4 | | 叢書名稱 | The Springer International Series in Engineering and Computer Science | | 圖書封面 |  | | 描述 | .High-Level Synthesis for Real-Time Digital SignalProcessing. is a comprehensive reference work for researchers andpracticing ASIC design engineers. It focuses on methods for compilingcomplex, low to medium throughput DSP system, and on theimplementation of these methods in the CATHEDRAL-II compiler. .The emergence of independent silicon foundries, the reduced price ofsilicon real estate and the shortened processing turn-around timebring silicon technology within reach of system houses. Even for lowvolumes, digital systems on application-specific integrated circuits(ASICs) are becoming an economically meaningful alternative fortraditional boards with analogue and digital commodity chips. .ASICs cover the application region where inefficiencies inherent togeneral-purpose components cannot be tolerated. However, full-customhandcrafted ASIC design is often not affordable in this competitivemarket. Long design times, a high development cost for alowproduction volume, the lack of silicon designers and the lack ofsuited design facilities are inherent difficulties to manualfull-custom chip design. .To overcome these drawbacks, complex systems have to be integrated inASICs much faster and | | 出版日期 | Book 1993 | | 關(guān)鍵詞 | ASIC; Signal; analog; architecture; bridge; complexity; computer-aided design (CAD); development; digital si | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4757-2222-2 | | isbn_softcover | 978-1-4419-5134-2 | | isbn_ebook | 978-1-4757-2222-2Series ISSN 0893-3405 | | issn_series | 0893-3405 | | copyright | Springer Science+Business Media Dordrecht 1993 |
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