| 書目名稱 | Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing | | 副標題 | From Algorithm to Ar | | 編輯 | Chenxin Zhang,Liang Liu,Viktor ?wall | | 視頻video | http://file.papertrans.cn/427/426010/426010.mp4 | | 概述 | Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration;.Describes a uni | | 圖書封面 |  | | 描述 | This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G. | | 出版日期 | Book 2016 | | 關鍵詞 | Domain-specific heterogeneous reconfigurable computing; Heterogeneous Reconfigurable Processors; Netwo | | 版次 | 1 | | doi | https://doi.org/10.1007/978-3-319-24004-6 | | isbn_ebook | 978-3-319-24004-6 | | copyright | Springer International Publishing Switzerland 2016 |
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