| 書目名稱 | From Contamination to Defects, Faults and Yield Loss | | 副標(biāo)題 | Simulation and Appli | | 編輯 | Jitendra B. Khare,Wojciech Maly | | 視頻video | http://file.papertrans.cn/349/348609/348609.mp4 | | 叢書名稱 | Frontiers in Electronic Testing | | 圖書封面 |  | | 描述 | Over the years there has been a large increase in thefunctionality available on a single integrated circuit. This has beenmainly achieved by a continuous drive towards smaller feature sizes,larger dies, and better packing efficiency. However, this greaterfunctionality has also resulted in substantial increases in thecapital investment needed to build fabrication facilities. Given sucha high level of investment, it is critical for IC manufacturers toreduce manufacturing costs and get a better return on theirinvestment. The most obvious method of reducing the manufacturing costper die is to improve manufacturing yield. .Modern VLSI research and engineering (which includes designmanufacturing and testing) encompasses a very broad range ofdisciplines such as chemistry, physics, material science, circuitdesign, mathematics and computer science. Due to this diversity, theVLSI arena has become fractured into a number of separate sub-domainswith little or no interaction between them. This is the case with therelationships between testing and manufacturing. ..From Contamination to Defects, Faults and Yield Loss: Simulationand. .Applications. focuses on the core of the interface betweenmanuf | | 出版日期 | Book 1996 | | 關(guān)鍵詞 | CMOS; VLSI; circuit design; computer; integrated circuit; manufacturing; material; mechanism; model; modeling | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4613-1377-9 | | isbn_softcover | 978-1-4612-8595-3 | | isbn_ebook | 978-1-4613-1377-9Series ISSN 0929-1296 | | issn_series | 0929-1296 | | copyright | Kluwer Academic Publishers 1996 |
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