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Titlebook: Enhanced Virtual Prototyping for Heterogeneous Systems; Muhammad Hassan,Daniel Gro?e,Rolf Drechsler Book 2023 The Editor(s) (if applicable

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發(fā)表于 2025-3-21 19:49:58 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
書目名稱Enhanced Virtual Prototyping for Heterogeneous Systems
編輯Muhammad Hassan,Daniel Gro?e,Rolf Drechsler
視頻videohttp://file.papertrans.cn/312/311265/311265.mp4
概述Provides an extensive introduction to the modern VP-based verification flow for heterogeneous SOCs.Introduces a novel metamorphic testing technique for heterogeneous SOCs which does not require refere
圖書封面Titlebook: Enhanced Virtual Prototyping for Heterogeneous Systems;  Muhammad Hassan,Daniel Gro?e,Rolf Drechsler Book 2023 The Editor(s) (if applicable
描述.This book describes a comprehensive combination of methodologies that strongly enhance the modern Virtual Prototype (VP)-based verification flow for heterogeneous systems-on-chip (SOCs). In particular, the book combines verification and analysis aspects across various stages of the VP-based verification flow, providing a new perspective on verification by leveraging advanced techniques, like metamorphic testing, data flow testing, and information flow testing. In addition, the book puts a strong emphasis on advanced coverage-driven methodologies to verify the functional behavior of the SOC as well as ensure its security..Provides an extensive introduction to the modern VP-based verification flow for heterogeneous SOCs;.Introduces a novel metamorphic testing technique for heterogeneous SOCs which does not require reference models;.Includes automated advanced data flow coverage-driven methodologies tailored for SystemC/AMS-based VPs;.Describes enhanced functional coverage-driven methodologies to verify various functional behaviors of RF amplifiers..
出版日期Book 2023
關(guān)鍵詞Virtual Prototypes at the Electronic System Level; SystemC/AMS-based Virtual Prototypes; Formal verifi
版次1
doihttps://doi.org/10.1007/978-3-031-05574-4
isbn_softcover978-3-031-05576-8
isbn_ebook978-3-031-05574-4
copyrightThe Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerl
The information of publication is updating

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AMS Metamorphic Testing Environment,heck VP correctness. Traditionally, the general VP verification environment requires a reference model for assertions/checkers to check if the VP testsuite executes the Design Under Verification (DUV) as expected. However, the main challenge in this regard is the availability of reference models for
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AMS Enhanced Code Coverage Verification Environment,w. Since a VP is in essence a software model, simulation-based verification for VPs is actually very similar to software testing, and therefore, techniques from this domain can be borrowed to ensure a high quality of verification results. These enable hardware (HW)/software (SW) co-design and verifi
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Conclusion, analog and digital Intellectual Properties (IPs) on a single die, while running Software (SW) on top, has significantly increased the functionality and reduced the area of the SOC. However, the increased design complexity has become a bottleneck for the successful co-design of secure multi-discipli
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chnique for heterogeneous SOCs which does not require refere.This book describes a comprehensive combination of methodologies that strongly enhance the modern Virtual Prototype (VP)-based verification flow for heterogeneous systems-on-chip (SOCs). In particular, the book combines verification and an
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Preliminaries, introduces the Timed Data Flow (TDF) Model of Computation (MoC). A TDF model defines time domain processing and is used to model the pure algorithmic or procedural description of the underlying design.
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