| 書目名稱 | Enhanced Virtual Prototyping |
| 副標(biāo)題 | Featuring RISC-V Cas |
| 編輯 | Vladimir Herdt,Daniel Gro?e,Rolf Drechsler |
| 視頻video | http://file.papertrans.cn/312/311264/311264.mp4 |
| 概述 | Provides a comprehensive set of techniques to enhance all key aspects of a Virtual Prototype (VP)-based design flow.Includes automated formal verification methods and advanced coverage-guided testing |
| 圖書封面 |  |
| 描述 | .This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects.. |
| 出版日期 | Book 2021 |
| 關(guān)鍵詞 | Virtual Prototypes at the Electronic System Level; SystemC-based Virtual Prototypes; Formal verificati |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-3-030-54828-5 |
| isbn_softcover | 978-3-030-54830-8 |
| isbn_ebook | 978-3-030-54828-5 |
| copyright | The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerl |