Titlebook: Electromigration Modeling at Circuit Layout Level; Cher Ming Tan,Feifei He Book 2013 The Author(s) 2013 3D Modeling.Atomic Flux Divergence

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書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level影響因子(影響力)




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level影響因子(影響力)學(xué)科排名




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level網(wǎng)絡(luò)公開(kāi)度




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level網(wǎng)絡(luò)公開(kāi)度學(xué)科排名




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level被引頻次




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level被引頻次學(xué)科排名




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level年度引用




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level年度引用學(xué)科排名




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level讀者反饋




書(shū)目名稱(chēng)Electromigration Modeling at Circuit Layout Level讀者反饋學(xué)科排名

DEVIL

3D Circuit Model Construction and Simulation,a method to construct a complete 3D circuit model is necessary and this chapter will illustrate the construction and the corresponding transient electro-thermo-structural simulations for the EM reliability assessment of an IC.

Self-Help-Group

Comparison of EM Performances in Circuit and Test Structures, EM models in literature use the line-via test structures which are only part of the real circuit structure. To further demonstrate the necessity for complete circuit modeling, the comparison of the EM performances in a circuit structure and a standard line-via test structure is performed in this ch

Emmenagogue

Interconnect EM Reliability Modeling at Circuit Layout Level,cuits consist of a large number of transistors and other circuit components connected by complex inter-block connections made of multiple metal layers. In this chapter, a complete 3D circuit model including both intra- and inter-block interconnects is constructed. Electro-thermo-structural simulatio

Conscientious

否決

Comparison of EM Performances in Circuit and Test Structures,complete circuit modeling, the comparison of the EM performances in a circuit structure and a standard line-via test structure is performed in this chapter. Both the EM test condition and the circuit operation condition are considered.

否決

Interconnect EM Reliability Modeling at Circuit Layout Level,. In this chapter, a complete 3D circuit model including both intra- and inter-block interconnects is constructed. Electro-thermo-structural simulations are performed, and the modifications that can help enhancing the EM reliability of the circuit are carried out based on the observations in the simulation.

反應(yīng)

Die Einstellungen und ihr Gegenstandstributions of the interconnects in an IC were greatly affected by the interconnect structures and the surrounding materials, the 2D EM circuit simulators based only on current density were no longer adequate. Thus, there is a need for 3D EM modeling at circuit layout level.

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