書目名稱 | Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs | 編輯 | Jesús Ruiz-Amaya,Manuel Delgado-Restituto,ángel Ro | 視頻video | http://file.papertrans.cn/271/270337/270337.mp4 | 概述 | Describes efficient procedures for hierarchical top-down design of pipeline converters.Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level paramet | 圖書封面 |  | 描述 | This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters. | 出版日期 | Book 2011 | 關(guān)鍵詞 | ADC; Analog Circuits; Analog Circuits and Signal Processing; Analog to Digital Converters; CMOS; Embedded | 版次 | 1 | doi | https://doi.org/10.1007/978-1-4419-8846-1 | isbn_softcover | 978-1-4899-9318-2 | isbn_ebook | 978-1-4419-8846-1 | copyright | Springer Science+Business Media, LLC 2011 |
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