Titlebook: Dependable Computing - EDCC-1; First European Depen Klaus Echtle,Dieter Hammer,David Powell Conference proceedings 1994 Springer-Verlag Ber

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書目名稱Dependable Computing - EDCC-1影響因子(影響力)




書目名稱Dependable Computing - EDCC-1影響因子(影響力)學(xué)科排名




書目名稱Dependable Computing - EDCC-1網(wǎng)絡(luò)公開度




書目名稱Dependable Computing - EDCC-1網(wǎng)絡(luò)公開度學(xué)科排名




書目名稱Dependable Computing - EDCC-1被引頻次




書目名稱Dependable Computing - EDCC-1被引頻次學(xué)科排名




書目名稱Dependable Computing - EDCC-1年度引用




書目名稱Dependable Computing - EDCC-1年度引用學(xué)科排名




書目名稱Dependable Computing - EDCC-1讀者反饋




書目名稱Dependable Computing - EDCC-1讀者反饋學(xué)科排名

帶來

,Formal semantics for Ward & Mellor’s transformation schemas and the specification of fault-tolerant92]. Each model has its own application area, e.g., one fits best for fault-tolerant systems, but only one model is modular. A number of ambiguities and inconsistencies in Ward & Mellor‘s original definition is resolved.

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外貌

Coverage of delay faults: When 13% and 99% mean the same, develop a procedure for fast, simulation-free grading of delay faults. It is shown that, depending on what “detection of a delay fault by an input pattern” means, a randomly generated test sequence can provide very different values of fault coverage; these values range, for one of the examined benchmark circuits, from 13% to over 99%.

金盤是高原

得體

Stratospheric-Mesospheric Midwinter Warmingseriodic workload. Such a methodology allows us to define optimization strategies whose goal is to determine the optimal trade-off between the system cost and the overall quality of the delivered service.

得體

Nam Q. Le,Hiroyoshi Mitake,Hung V. Tranest synthesis, multivalued simulation, testability analysis), only a single library of AGs will be used, which reduces the cost of creating and updating component libraries. Aoverview of the model and methods is given and a description of a system for automated test program generation is described.

Indebted

Norma Montealegre,Franz J. Rammighigher or lower than a given threshold voltage. The approach is extremely faster than the previous ones since no SPICE simulation is required. The accuracy is of 0.06V to compare with SPICE simulations. In case of library based design a preliminary library characterization is possible allowing a very fast time during fault simulation.

向下

Marco Platzner,Jürgen Teich,Norbert Wehnments on the microprocessors 68000 and 68070. For the 68000 microprocessor, the type of double errors that occur is explained by a model based on a study of the register file layout. The experiments show a significant fraction of SEUs causing two bits to flip in the primary error manifestation.

積習(xí)已深

Field Service and Resource Schedulingfficult. This paper presents a method to derive such simulators systematically and efficiently. The basic idea is to inject faults into the simulator of the healthy environment system to obtain the simulators of faulty environments.