| 書目名稱 | Circuit Design for CMOS VLSI | | 編輯 | John P. Uyemura | | 視頻video | http://file.papertrans.cn/227/226588/226588.mp4 | | 圖書封面 |  | | 描述 | During the last decade, CMOS has become increasingly attractive as a basic integrated circuit technology due to its low power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a variety of CMOS circuit styles, some based on static complementary con- ductance properties, but others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines for precharge-evaluate se- quencing. In this comprehensive book, the reader is led systematically through the entire range of CMOS circuit design. Starting with the in- dividual MOSFET, basic circuit building blocks are described, leading to a broad view of both combinatorial and sequential circuits. Once these circuits are considered in the light of CMOS process technologies, impor- tant topics in circuit performance are considered, including characteristics of interconnect, gate delay, device sizing, and I/O buffering. Basic circuits are then composed to form macro elements such as multipliers, where the reader acquires a unified view of architectural performance through par- allelism, and circuit performance through careful attention to circuit-level and layout design optimizatio | | 出版日期 | Book 1992 | | 關鍵詞 | CMOS; MOSFET; VLSI; analog; circuit; circuit design; integrated circuit | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4615-3620-8 | | isbn_softcover | 978-1-4613-6609-6 | | isbn_ebook | 978-1-4615-3620-8 | | copyright | Springer Science+Business Media New York 1992 |
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