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Titlebook: Broadband Direct RF Digitization Receivers; Olivier Jamin Book 2014 Springer International Publishing Switzerland 2014 Analog Integrated C

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發(fā)表于 2025-3-21 20:03:03 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
期刊全稱Broadband Direct RF Digitization Receivers
影響因子2023Olivier Jamin
視頻videohttp://file.papertrans.cn/192/191235/191235.mp4
發(fā)行地址Provides system-level analysis of direct RF sampling & digitization receivers, from the antenna to the digital channel selection.Includes analysis of broadband non-linearity, applicable for low-pass a
學(xué)科分類Analog Circuits and Signal Processing
圖書封面Titlebook: Broadband Direct RF Digitization Receivers;  Olivier Jamin Book 2014 Springer International Publishing Switzerland 2014 Analog Integrated C
影響因子This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains.? A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis.? Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC. .A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of
Pindex Book 2014
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Application to the System Design of a Multichannel Cable Receiver,
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Book 2014) are used to relax the requirements of a 2.7GHz 11-bit ADC. .A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of
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Analog Circuits and Signal Processinghttp://image.papertrans.cn/b/image/191235.jpg
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https://doi.org/10.1007/978-3-319-01150-9Analog Integrated Circuit Design; Broadband Non-linearity; RF Antenna; RF Design; RF Digitization Receiv
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978-3-319-34533-8Springer International Publishing Switzerland 2014
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