Titlebook: Architecture of Computing Systems -- ARCS 2013; 26th International C Hana Kubátová,Christian Hochberger,Bernhard Sick Conference proceeding

無彈性

A Highly Dependable Self-adaptive Mixed-Signal Multi-core System-on-Chip,rtificial hormone system (AHS) as general control mechanism. The AHS is an implementation of a completely decentralized, self-organizing task allocation mechanism using self-X properties. To minimize the increase in complexity especially with respect to the analog parts, several different implementa

Valves

GULLY

GALS-CMP: Chip-Multiprocessor for GALS Embedded Systems,ronous (GALS) formal model of computation. Programs are specified using the SystemJ concurrent programming language, suitable for modeling heterogeneous embedded applications that contain reactive and control driven parts and interact with the external environment. The proposed architecture is based

Aviary

HW/SW Tradeoffs for Dynamic Message Scheduling in Controller Area Network (CAN),articipating computing nodes, which affect the usage of the communication bus. The concept of self-adaptivity of participating nodes plays an important role in reducing design effort while guaranteeing high system performance. The dynamic offset adaptation algorithm (DynOAA) for adaptive message sch

HEW

A Data-Driven Approach for Executing the CG Method on Reconfigurable High-Performance Systems,dy the applicability of the Convey HC-1 for numerical applications by decomposing a preconditioned conjugate gradient (CG) method into several independent kernels that can operate concurrently. To allow overlapped execution and to minimize data transfers, we stream the data between the kernel units

太空

曲解

Profiling Energy Consumption of I/O Functions in Embedded Applications,pplication helps developers to understand the energy consumption of the software and to further optimize the energy efficiency of the designs. However, most of the existing energy profiling tools concentrate on the energy consumption analyses of processors and memory, and provide limited supports to

Glossy

An Application-Aware Cache Replacement Policy for Last-Level Caches,cient cache replacement policies at LLC are essential for reducing the off-chip memory traffic as well as contention for memory bandwidth. Cache replacement techniques for unicore LLCs may not be efficient for multicore LLCs as multicore LLCs can be shared by applications with varying access behavio

Gum-Disease

Deploying Hardware Locks to Improve Performance and Energy Efficiency of Hardware Transactional Memve to lock-based synchronization. Among the two most important alternatives proposed for conflict detection and data versioning in today’s Hardware Transactional Memory systems (HTMs), the .one allows increased concurrency, potentially bringing higher performance levels in most cases. Unfortunately,

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