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Titlebook: Algorithms for Synthesis and Testing of Asynchronous Circuits; Luciano Lavagno,Alberto Sangiovanni-Vincentelli Book 1993 Springer Science+

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發(fā)表于 2025-3-21 16:12:38 | 只看該作者 |倒序瀏覽 |閱讀模式
期刊全稱Algorithms for Synthesis and Testing of Asynchronous Circuits
影響因子2023Luciano Lavagno,Alberto Sangiovanni-Vincentelli
視頻videohttp://file.papertrans.cn/154/153252/153252.mp4
學科分類The Springer International Series in Engineering and Computer Science
圖書封面Titlebook: Algorithms for Synthesis and Testing of Asynchronous Circuits;  Luciano Lavagno,Alberto Sangiovanni-Vincentelli Book 1993 Springer Science+
影響因子Since the second half of the 1980s asynchronous circuits have been the subject of a great deal of research following a period of relative oblivion. The lack of interest in asynchronous techniques was motivated by the progressive shift towards synchronous design techniques that had much more structure and were much easier to verify and synthesize. System design requirements made it impossible to eliminate totally the use of asynchronous circuits. Given the objective difficulty encountered by designers, the asynchronous components of electronic systems such as interfaces became a serious bottleneck in the design process. The use of new models and some theoretical breakthroughs made it possible to develop asynchronous design techniques that were reliable and effective. This book describes a variety of mathematical models and of algorithms that form the backbone and the body of a new design methodology for asyn- chronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in ex- ploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event syst
Pindex Book 1993
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The Design For Testability Methodology,ties among path delays inside the circuit is satisfied. So using a suitable delay model during the synthesis process it is possible to guarantee hazard-freeness in the absence of delay faults. Now our goal is to test those path delays, and be sure that the above mentioned inequalities are satisfied
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0893-3405 livion. The lack of interest in asynchronous techniques was motivated by the progressive shift towards synchronous design techniques that had much more structure and were much easier to verify and synthesize. System design requirements made it impossible to eliminate totally the use of asynchronous
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The State Encoding Methodology, Until now the burden of satisfying the CSC property has been placed mostly on the designer. Kondratyev.([66, 134]) and Vanbekbergen.([123]) addressed this problem, but only in the limited case of STGs whose underlying PN is a Marked Graph.
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Book 1993methodology for asyn- chronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in ex- ploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event syst
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