| 期刊全稱 | A Primer on Hardware Prefetching | | 影響因子2023 | Babak Falsafi,Thomas F. Wenisch | | 視頻video | http://file.papertrans.cn/142/141905/141905.mp4 | | 學(xué)科分類 | Synthesis Lectures on Computer Architecture | | 圖書封面 |  | | 影響因子 | Since the 1970’s, microprocessor-based digital platforms have been riding Moore’s law, allowing for doubling of density for the same area roughly every two years. However, whereas microprocessor fabrication has focused on increasing instruction execution rate, memory fabrication technologies have focused primarily on an increase in capacity with negligible increase in speed. This divergent trend in performance between the processors and memory has led to a phenomenon referred to as the “Memory Wall.” To overcome the memory wall, designers have resorted to a hierarchy of cache memory levels, which rely on the principal of memory access locality to reduce the observed memory access time and the performance gap between processors and memory. Unfortunately, important workload classes exhibit adverse memory access patterns that baffle the simple policies built into modern cache hierarchies to move instructions and data across cache levels. As such, processors often spend much time idling upon a demand fetch of memory blocks that miss in higher cache levels. Prefetching—predicting future memory accesses and issuing requests for the corresponding memory blocks in advance of explicit acces | | Pindex | Book 2014 |
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