| 書目名稱 | Yield and Variability Optimization of Integrated Circuits | | 編輯 | J. C. Zhang,M. A. Styblinski | | 視頻video | http://file.papertrans.cn/1061/1060361/1060361.mp4 | | 描述 | Traditionally, Computer Aided Design (CAD) tools have been used to create the nominal design of an integrated circuit (IC), such that the circuit nominal response meets the desired performance specifications. In reality, however, due to the disturbances ofthe IC manufacturing process, the actual performancesof the mass produced chips are different than those for the nominal design. Even if the manufacturing process were tightly controlled, so that there were little variations across the chips manufactured, the environmentalchanges (e. g. those oftemperature, supply voltages, etc. ) would alsomakethe circuit performances vary during the circuit life span. Process-related performance variations may lead to low manufacturing yield, and unacceptable product quality. For these reasons, statistical circuit design techniques are required to design the circuit parameters, taking the statistical process variations into account. This book deals with some theoretical and practical aspects of IC statistical design, and emphasizes how they differ from those for discrete circuits. It de- scribes a spectrum of different statistical design problems, such as parametric yield optimization, generaliz | | 出版日期 | Book 1995 | | 關(guān)鍵詞 | circuit; integrated circuit; material; modeling; performance tuning | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4615-2225-6 | | isbn_softcover | 978-1-4613-5935-7 | | isbn_ebook | 978-1-4615-2225-6 | | copyright | Springer Science+Business Media New York 1995 |
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