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Titlebook: Digital Logic for Computing; John Seiffertt Textbook 2017 Springer International Publishing AG 2017 computer arthimetic.digital logic.form

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樓主: implicate
21#
發(fā)表于 2025-3-25 04:53:52 | 只看該作者
22#
發(fā)表于 2025-3-25 08:56:42 | 只看該作者
23#
發(fā)表于 2025-3-25 14:25:47 | 只看該作者
Logic Function Synthesis,Now expert at the task of writing logic functions using the basic operators to describe digital systems, it’s time to take advantage of a useful tool: the ..
24#
發(fā)表于 2025-3-25 16:17:28 | 只看該作者
Signed Numbers,We’ve designed adders that can work with positive numbers. But what about negative numbers? We call systems that can incorporate negative numbers . and consider those that cannot handle negative numbers to be .. The binary system discussed in the previous chapter is more properly called .
25#
發(fā)表于 2025-3-25 22:00:21 | 只看該作者
Encoding Code,We’re using the computer as the main motivating example throughout our development of digital design, so let’s get to programming!
26#
發(fā)表于 2025-3-26 01:46:27 | 只看該作者
Sequential Logic Elements,When we write our programs, we take for granted the fact that we can declare a variable x and assign it some value and be assured that it will retain said value until we specify it is to be modified.
27#
發(fā)表于 2025-3-26 06:21:20 | 只看該作者
Multiplexers and Comparators,Now that we have a register and an adder, we can start building . to implement our instructions. Suppose we have the instruction . which will compute A + R1 and store the result back in A. The circuit in Fig. 12.1 does this for us.
28#
發(fā)表于 2025-3-26 10:52:39 | 只看該作者
Decoders and Register Files,The multiplexer lets us select one of a number of inputs to pass through to the next device. The . allows us to select one of a number of connected devices to activate in response to an input (the eponymous .). These devices are similar and are often confused by those new to digital design.
29#
發(fā)表于 2025-3-26 14:51:23 | 只看該作者
Logic Gates,demanded by the equations derived for our logic functions. If our minimal form is ., say, then we need to perform one NOT operation, one two-input OR operation, and two two-input AND operations. We can draw a schematic of the circuit layout required, as seen in Fig. 6.1:
30#
發(fā)表于 2025-3-26 20:05:47 | 只看該作者
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