標題: Titlebook: VLSI: Systems on a Chip; IFIP TC10 WG10.5 Ten Luis Miguel Silveira,Srinivas Devadas,Ricardo Reis Book 2000 IFIP International Federation fo [打印本頁] 作者: JAZZ 時間: 2025-3-21 20:07
書目名稱VLSI: Systems on a Chip影響因子(影響力)
書目名稱VLSI: Systems on a Chip影響因子(影響力)學科排名
書目名稱VLSI: Systems on a Chip網(wǎng)絡公開度
書目名稱VLSI: Systems on a Chip網(wǎng)絡公開度學科排名
書目名稱VLSI: Systems on a Chip被引頻次
書目名稱VLSI: Systems on a Chip被引頻次學科排名
書目名稱VLSI: Systems on a Chip年度引用
書目名稱VLSI: Systems on a Chip年度引用學科排名
書目名稱VLSI: Systems on a Chip讀者反饋
書目名稱VLSI: Systems on a Chip讀者反饋學科排名
作者: invert 時間: 2025-3-21 21:23 作者: 小丑 時間: 2025-3-22 02:07
Luis Miguel Silveira,Srinivas Devadas,Ricardo Reis作者: licence 時間: 2025-3-22 06:36 作者: Trypsin 時間: 2025-3-22 10:58
Yue Wu,Shenggao Li,Mohammed Ismail,H?kan Olsson Professor Ghosh’s book will help us change and advance the methods of systems engineering and technology. Vision Inspired vision sees ahead of others what will or may come to be, a vivid, imagined concept or anticipation. An inspired vision personi?es what is good and what like-minded individuals h作者: 逃避現(xiàn)實 時間: 2025-3-22 16:52
J. Alcantara,S. Salom?o,E. Granja,V. Alves,F. Fran?ahren entsprechend rechenzeitinten-siv. Dafür erh?lt man aber auch unter Umst?nden sehr realistisch aussehende Daxstellungen, auf denen auch reflektierende und durchscheinende Objekte gut wiedergegeben sind, und die auch Ph?mone wie . und mehrfache Reflexionen korrekt daxstellen.作者: habile 時間: 2025-3-22 19:11
n this paper, we enumerate the principles that we believe embody the essence of A., describe a model that satisfies these principles, and illustrate this model with a language that, while more uniform and general, retains the character of A..作者: Factual 時間: 2025-3-22 22:24
Shenggao Li,Yue Wu,Chunlei Shi,Mohammed Ismailonistic theory, using a form of possible-world semantics first applied to programming-language interpretation by Reynolds and F. J. Oles to give an abstract treatment of stack-oriented storage management. The model provides a satisfactory solution to all previously-known problems with the interpreta作者: Concomitant 時間: 2025-3-23 02:11
Geoffrey B. Jackson,Saleel V. Awsare,Lawrence D. Engh,Mark A. Hemming,Peter Holzmann,Oliver C. Kao,C respect to observational manifestations which characterize already known CA stars: Ca II H and K emission cores, photometric variability attributable to starspots, soft x-ray emission, non-thermal radio emission, ultraviolet and infrared excess, and alternating period changes. The conclusion is tha作者: 高調(diào) 時間: 2025-3-23 06:40
Bingxin Li,Hannu Tenhunenith respect to input and output operations, to the use of higly parallel arithmetic units, to the construction of networks of tightly interconnected processors. In this introductory paper we examine various examples of abstract and real parallel machines with the aim of providing the basic concepts 作者: fatuity 時間: 2025-3-23 09:50
Yue Wu,Shenggao Li,Mohammed Ismail,H?kan Olsson, ?rst as a student leader at Stanford, where he initiated the ?rst IEEE Computer Society’s student chapter, and later as an esteemed and inspiring friend whose transdisciplinary research broadened and enhanced the horizons of practitioners of computer science and engineering, including my own. His 作者: 間接 時間: 2025-3-23 13:58
S. S. Rajput,S. S. Jamuarements) by paying the price of a little extra complexity in algorithm design. For example, quicksort sorts by partitioning a sequence into two halves, sorting each half, and then combining the halves to produce a sorted sequence. The partitioning rearranges the sequence elements so that all elements作者: 使人入神 時間: 2025-3-23 19:33
Yue Wu,Hong-sun Kim,Fredrik Jonsson,Mohammed Ismail,H?kan Olsson 0<.<1/2). For each of these three graph classes we present an exponential time algorithm solving the Minimum Dominating Set problem. The running times of those algorithms are .(1.4173.) for chordal graphs, .(1.4956.) for circle graphs, and . for .-dense graphs.作者: Headstrong 時間: 2025-3-23 22:24 作者: 太空 時間: 2025-3-24 03:27
Atsushi Iwata,Makoto Nagata,Hiroyuki Nakamoto,Noriaki Takeda,Mitsuru Homma,Hiroto Higashi,Takashi Mome when the word size is .(log.). In this paper we give an algorithm for sorting integers in expected linear time when the word size is Ω(log.. loglog.). Previously expected linear time sorting was only possible for word size Ω(log..). Part of our construction is a new packed sorting algorithm that 作者: fallible 時間: 2025-3-24 10:32
A. M. Rassau,G. Alagoda,D. Lucas,J. Austin-Crowe,K. Eshraghianh as . The asymptotic behavior of . as .→∞ with . and . fixed depends on whether log ./ log . is rational or irrational. The solution of Fredman and Knuth used analytic methods in both cases, and used in particular the Wiener-Ikehara Tauberian theorem in the irrational case. We show that a more expl作者: 共同時代 時間: 2025-3-24 12:45
Camille Diou,Lionel Torres,Michel Robert it is desirable to factor the cost of links into the cost of distributed computation. Assume that associated with each link is a positive . representing the cost of sending one message along the link and the cost of an algorithm executed on a . network is the sum of the costs of all messages sent d作者: 隨意 時間: 2025-3-24 15:49
Abdellah Touhafi,Wouter Brissinck,Erik Dirkxnd a budget ., consider the problem of finding a spanning tree of total edge length at most . and minimum total weight under this restriction. This . is weakly NP-hard. We present a polynomial-time approximation scheme for this problem. This algorithm always produces a spanning tree of total length 作者: 膽小鬼 時間: 2025-3-24 21:13
Nuno Lau,Valery Sklyarovmeinsamen Teiler zweier natürlicher Zahlen, die L?sung eines linearen Gleichungssystems oder eine rationale N?herung für eine Quadratwurzel ermitteln, stets ist ein Algorithmus im Spiel. Selbst die Multiplikation zweier Dezimalzahlen oder die Bestimmung des Maximums von n rationalen Zahlen setzt ein作者: Proponent 時間: 2025-3-25 02:22 作者: 排出 時間: 2025-3-25 05:45 作者: Indent 時間: 2025-3-25 08:59 作者: 隱士 時間: 2025-3-25 14:56
Bingxin Li,Hannu Tenhunenand discuss their fundamental characteristics. Besides we briefly discuss under what circumstances and up to what extent parallel devices may provide a more efficient solution to computational problems.作者: 厚臉皮 時間: 2025-3-25 16:04 作者: 多產(chǎn)魚 時間: 2025-3-25 22:55
Abdellah Touhafi,Wouter Brissinck,Erik Dirkxat most (1 + ε). and of total weight at most that of any spanning tree of total length at most ., for any fixed ε >0. The algorithm uses Lagrangean relaxation, and exploits adjacency relations for matroids.作者: incision 時間: 2025-3-26 02:25
Rui L. Aguiar,Dinis M. Santos Fl?chen (oder Stadtteile) mehr als einen gemeinsamen Randpunkt besitzen (bzw. eine verbindende Brücke haben). Das entsprechende F?rbungsproblem besteht nun darin, benachbarte Ecken unterschiedlich zu f?rben und dabei m?glichst wenige Farben zu verwenden.作者: Boycott 時間: 2025-3-26 07:13 作者: Albinism 時間: 2025-3-26 12:28 作者: Petechiae 時間: 2025-3-26 15:18 作者: observatory 時間: 2025-3-26 19:50 作者: MOAT 時間: 2025-3-26 21:47
S. S. Rajput,S. S. Jamuaran approximation to the median is good enough. Though quicksort has a potentially .(.) performance, the average case performance is .(. log .). Hence it is the perferred sorting algorithm for large data sets in most cases.作者: murmur 時間: 2025-3-27 04:21
N. Masoumi,M. I. Elmasry,S. Safavi-Naeini based on the definition of a new reduction operator which recursively eliminates the simple parts of the polygon. We also prove that every gallery with . convex vertices can be guarded by at most 2.???4 guards, which is optimal.作者: 艱苦地移動 時間: 2025-3-27 05:42 作者: 清楚 時間: 2025-3-27 11:41 作者: 混亂生活 時間: 2025-3-27 15:55
An IEEE Compliant Floating Point MAF, Critical path delay and latency are reduced by incorporating speculative rounding and data path simplifications. The proposed scheme offers a worst case power reduction of around 25%, in contrast to a comparable scheme reported in literature.作者: 踉蹌 時間: 2025-3-27 20:11
1868-4238 sly being observed in operating speeds. This increase in capacity has allowed for more complex systems to be built on a single silicon chip. Coupled with this functionality increase, speed improvements have fueled tremendous advancements in computing and have enabled new multi-media applications. Su作者: athlete’s-foot 時間: 2025-3-27 23:08 作者: Hla461 時間: 2025-3-28 05:45
Atsushi Iwata,Makoto Nagata,Hiroyuki Nakamoto,Noriaki Takeda,Mitsuru Homma,Hiroto Higashi,Takashi Mo.). Previously expected linear time sorting was only possible for word size Ω(log..). Part of our construction is a new packed sorting algorithm that sorts . integers of ./.-bits packed in . words, where . is the number of integers packed in a word of size . bits. The packed sorting algorithm runs in expected . time.作者: 能得到 時間: 2025-3-28 09:48
R. V. K. Pillai,D. Al-Khalili,A. J. Al-Khalilit dem Programm Spannungen, Str?me und Widerst?nde in einem Netzwerk berechnen kann. Die Anwendung des Programms setzt allerdings eine gewisse Kenntnis der Methode der ?quivalenten Ersatzquellen voraus, da der Anwender die Reihenfolge der Reduktion bestimmen mu?.作者: MOT 時間: 2025-3-28 13:45
Optimizing Mixer Noise Performance: a 2.4 GHz Gilbert Downconversion Mixer for W-CDMA Application,ith a 3 V power supply and consumes only 4.5 mW power. Targeting in designing high performance mixers of high yield within short design cycle, this paper addresses RF mixer design issues from an optimization and statistical point of view, and derived the noise equation based on a simple noise model 作者: 柳樹；枯黃 時間: 2025-3-28 17:01
An Analog Non-Volatile Storage System for Audio Signals with Signal Conditioning for Mobile Communict interface to acoustic transducer elements and provides signal conditioning to gain adjust, multiplex, filter and mix two independent signals. The system can record these processed signals as analog samples in a non-volatile flash EEPROM array for later retrieval. Control of the system is achieved作者: 許可 時間: 2025-3-28 22:39
A Design of Operational Amplifiers for Sigma Delta Modulators using 0.35um CMOS Process,th. As the short channel length causes performance degradation, a proper operational amplifier structure is selected to compensate the performance degradation. The op amp is designed to meet the requirement of high-speed high-resolution sigma delta modulators. It has a folded-cascode first stage and作者: Ancillary 時間: 2025-3-29 01:31 作者: ADJ 時間: 2025-3-29 05:59 作者: concise 時間: 2025-3-29 07:59
Nonlinearity Analysis of a Short Channel CMOS Circuit for RFIC Applications,mon source stage with source degeneration is used for the analysis. The effects of bias current, transistor size and effective voltage on the 3rd order intermodulation(IM3) of the common source stage have been investigated. The analytical results are verified with APLAC simulations.作者: 協(xié)迫 時間: 2025-3-29 12:06
A Fast Parametric Model for Contact-Substrate Coupling,physical parameters and geometrical characteristics of the contact and the substrate on the model are reported. We have derived model expressions for extraction of circuit model elements of the substrate. The method is very efficient for speed, memory usage, and is relevant for implementing in CAD t作者: Arbitrary 時間: 2025-3-29 17:08
A Feature Associative Processor for Image Recognition Based on a A-D Merged Architecture,e, is proposed. It consists of an image sensor, a cellular automaton and pattern matching processors based on PWM analogdigital merged circuits. IFAP extracts image features at a standard video frame rate with low power dissipation.作者: elucidate 時間: 2025-3-29 21:52 作者: 粗魯?shù)娜?nbsp; 時間: 2025-3-30 02:46 作者: 急急忙忙 時間: 2025-3-30 07:52 作者: indicate 時間: 2025-3-30 08:56 作者: 異常 時間: 2025-3-30 15:54
Dynamically Reconfigurable Implementation of Control Circuits,ain FPGA has been done using a Hierarchical Finite State Machine structure where each sub-algorithm implementation is independent from the others. Static and dynamically reconfigurable implementations using the XC6200 FPGA have been obtained by applying a number of commercial design tools together w作者: endure 時間: 2025-3-30 16:44 作者: Organonitrile 時間: 2025-3-30 22:11
Design and Analysis of On-Chip CPU Pipelined Caches, of cache access time on processor cycle time is the use of pipelined caches. A timing model for on-chip caches has recently been presented in [1]. In this paper the timing model given in [1] is extended so as pipelined caches can be handled. Also the possible pipelined architectures of a cache memo作者: slow-wave-sleep 時間: 2025-3-31 03:02 作者: anus928 時間: 2025-3-31 08:06
Clock Distribution Strategy for IP-based Development,stribution across an arbitrary number of blocks through the usage of controlled delay lines. A new clock frequency multiplication structure optimised for this clock distribution strategy is finally proposed, since multifrequency clock support is highly desired.作者: Modicum 時間: 2025-3-31 12:13
An Architectural and Circuit-Level Approach to Improving the Energy Efficiency of Microprocessor Meits the subarray partitioning of high speed memories and varying application requirements to dynamically disable partitions during appropriate execution periods. When applied to 4-way set associative caches, trading off a 2% performance degradation yields a combined 40% reduction in L1 Dcache and L2作者: 名字的誤用 時間: 2025-3-31 15:39 作者: 積習難改 時間: 2025-3-31 19:46 作者: 不幸的人 時間: 2025-3-31 22:10 作者: Malfunction 時間: 2025-4-1 03:14 作者: Campaign 時間: 2025-4-1 08:42 作者: PURG 時間: 2025-4-1 14:13 作者: DUCE 時間: 2025-4-1 15:54 作者: 好開玩笑 時間: 2025-4-1 21:36
