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標(biāo)題: Titlebook: VLSI-SOC: From Systems to Chips; IFIP TC 10/WG 10.5, Manfred Glesner,Ricardo Reis,Hans Eveking Conference proceedings 2006 IFIP Internatio [打印本頁]

作者: 灰塵    時(shí)間: 2025-3-21 17:07
書目名稱VLSI-SOC: From Systems to Chips影響因子(影響力)




書目名稱VLSI-SOC: From Systems to Chips影響因子(影響力)學(xué)科排名




書目名稱VLSI-SOC: From Systems to Chips網(wǎng)絡(luò)公開度




書目名稱VLSI-SOC: From Systems to Chips網(wǎng)絡(luò)公開度學(xué)科排名




書目名稱VLSI-SOC: From Systems to Chips被引頻次




書目名稱VLSI-SOC: From Systems to Chips被引頻次學(xué)科排名




書目名稱VLSI-SOC: From Systems to Chips年度引用




書目名稱VLSI-SOC: From Systems to Chips年度引用學(xué)科排名




書目名稱VLSI-SOC: From Systems to Chips讀者反饋




書目名稱VLSI-SOC: From Systems to Chips讀者反饋學(xué)科排名





作者: nautical    時(shí)間: 2025-3-21 22:35

作者: Blood-Vessels    時(shí)間: 2025-3-22 02:28

作者: sed-rate    時(shí)間: 2025-3-22 05:11
Wei Zou,Chris C. N. Chu,Sudhakar M. Reddy,Irith Pomeranz components of state-of-the-art models. Unlike previous works, . eliminates the need for any positive/negative sample construction or data augmentation, leading to enhanced interpretability of the item representation space and facilitating its extensibility to existing recommender systems. Through e
作者: 小步走路    時(shí)間: 2025-3-22 12:07

作者: MURKY    時(shí)間: 2025-3-22 16:25

作者: 使服水土    時(shí)間: 2025-3-22 19:18

作者: 低三下四之人    時(shí)間: 2025-3-22 21:43
Valentina Ciriani,Anna Bernasconi,Rolf Drechslerrs lack the capability of leveraging these interaction information to mitigate the cold-start problem, and further affect active ones belonging to one cluster. In this work, we explore user activeness and propose a frequency-dependent clustering of bandit model to deal with the aforementioned challe
作者: 具體    時(shí)間: 2025-3-23 03:13

作者: Tremor    時(shí)間: 2025-3-23 07:13
Dynamic Models for Substrate Coupling in Mixed-Mode Systems,C element model. The underlying algorithm is based upon a Finite Difference discretization of the substrate, leading to a large tridimensional mesh which is solved by means of a fast Multigrid algorithm..The proposed model is trivially incorporated into circuit simulation tools. Comparisons are also
作者: 殘忍    時(shí)間: 2025-3-23 12:56
Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths,in order to minimize the power consumption in the implemented architectures is also investigated. As will be shown, the use of the low power operators with an appropriate choice of coefficients can contribute for the reduction of power consumption of the FIR and FFT architectures. Additionally, a ne
作者: 滔滔不絕地說    時(shí)間: 2025-3-23 16:45
Conference proceedings 2006 levels: this conference aims to address these exciting new issues. The 2003 edition of VLSI-SoC conserved the traditional structure, which has been successful in previous editions. The quality of submissions (142 papers) made the selection process difficult, but finally 57 papers and 14 posters wer
作者: EXUDE    時(shí)間: 2025-3-23 20:24
1868-4238 new issues. The 2003 edition of VLSI-SoC conserved the traditional structure, which has been successful in previous editions. The quality of submissions (142 papers) made the selection process difficult, but finally 57 papers and 14 posters wer978-1-4419-4126-8978-0-387-33403-5Series ISSN 1868-4238 Series E-ISSN 1868-422X
作者: Pepsin    時(shí)間: 2025-3-24 00:31
llecting and querying seismic data is a procedure useful for local authorities in order to keep citizens informed as well as for specialized scientists, such as seismologists, physicists etc., in order to study the phenomenon in its detail. A seismic data management system should meet certain requir
作者: BET    時(shí)間: 2025-3-24 03:33

作者: ARY    時(shí)間: 2025-3-24 07:56

作者: 拉開這車床    時(shí)間: 2025-3-24 13:16
Thomas Hollstein,Ralf Ludewig,Heiko Zimmer,Christoph Mager,Simon Hohenstern,Manfred Glesnerit feedback. We propose an algorithm, where model parameters are updated user per user by minimizing a ranking loss over blocks of items constituted by a sequence of unclicked items followed by a clicked one. We illustrate through empirical evaluations on four large-scale benchmarks that removing no
作者: 逢迎春日    時(shí)間: 2025-3-24 17:39
Axel G. Braun,Djones V. Lettnin,Joachim Gerlach,Wolfgang Rosenstieland understand either because of intricate terminology or the potential absence of prior knowledge among their readers. Can we improve accessibility for everyone? This paper introduces the SimpleText Track at CLEF 2024, addressing the technical and evaluation challenges associated with making scient
作者: 接合    時(shí)間: 2025-3-24 19:57

作者: constitute    時(shí)間: 2025-3-25 01:53
Dominique Borrione,Menouer Boubekeur,Laurent Mounier,Marc Renaudin,Antoine Sirianin the documentation to search from contains poor punctuation or obsolete word forms and with little labeled training data. Here, we introduce a novel approach to conducting passage retrieval for multimodal question answering of ancient artworks where the query image caption of the multimodal query i
作者: 啪心兒跳動(dòng)    時(shí)間: 2025-3-25 05:42

作者: 形狀    時(shí)間: 2025-3-25 10:00

作者: Expressly    時(shí)間: 2025-3-25 14:12
Giuseppe Bonfini,Andrea S. Brogna,Roberto Saletti,Cristian Garbossa,Luca Colombini,Maurizio Bacci,Stng duplicates during evaluation artificially inflates performance scores, and, it penalizes those whose search systems diligently filter them. Although these negative effects have already been demonstrated a long time ago by Bernstein and Zobel?[.], we find that this has failed to move the community
作者: terazosin    時(shí)間: 2025-3-25 16:40

作者: Stress    時(shí)間: 2025-3-25 21:43
Alexandre M. Amory,Leandro A. Oliveira,Fernando G. Moraeste articles to readers with different comprehension abilities, and it further benefits education systems, web information systems, and digital libraries. Current methods for assessing readability employ empirical measures or statistical learning techniques that are limited by their ability to charac
作者: 搖晃    時(shí)間: 2025-3-26 01:12

作者: 競選運(yùn)動(dòng)    時(shí)間: 2025-3-26 08:16

作者: 解開    時(shí)間: 2025-3-26 10:50

作者: 柔美流暢    時(shí)間: 2025-3-26 15:36

作者: 極大的痛苦    時(shí)間: 2025-3-26 18:13
Casper Lageweg,Sorin Cotofana,Stamatis Vassiliadisof term frequency normalization. We develop here a method to assess the potential role of the term frequency-inverse document frequency measures that are commonly used in text retrieval systems. Since automatic information retrieval systems have to deal with documents of varying sizes and terms of v
作者: FRAX-tool    時(shí)間: 2025-3-26 23:55

作者: condone    時(shí)間: 2025-3-27 04:56

作者: Factual    時(shí)間: 2025-3-27 09:13

作者: 在前面    時(shí)間: 2025-3-27 10:05
Jürgen Becker,Michael Hübner,Michael Ullmannpotentials derived from DOM tree features using convolutional neural networks. The proposed method sets a new state-of-the-art performance for boilerplate removal on the CleanEval benchmark. As a component of information retrieval pipelines, it improves retrieval performance on the ClueWeb12 collection.
作者: fallible    時(shí)間: 2025-3-27 14:54
Giuseppe Bonfini,Andrea S. Brogna,Roberto Saletti,Cristian Garbossa,Luca Colombini,Maurizio Bacci,St. In this paper, we reproduce the aforementioned study and extend it to incorporate all TREC Terabyte, Web, and Core tracks. The worst-case penalty of having filtered duplicates in any of these tracks were losses between?8 and 53?ranks.
作者: In-Situ    時(shí)間: 2025-3-27 20:29
Thilo Pionteck,Lukusa D. Kabulepa,Manfred Glesneration announcement and show that the Domain Adaptation framework is suitable for this task. Finally, we propose a method that outperforms, by a large margin, the approaches proposed previously in the literature.
作者: 思想    時(shí)間: 2025-3-28 00:32
Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs,g functionality versus outer access capabilities ratio is faced by novel embedded and combined debugging and test structures. The integration of debugging possibilities is essential for an efficient co-design of SoC integrated hardware and software, especially for systems with integrated reconfigurable hardware parts.
作者: 鄙視讀作    時(shí)間: 2025-3-28 03:05
Exploration of Sequential Depth by Evolutionary Algorithms,. (DUV)..In this paper we present a simulation based approach to automatically determine the sequential depth of a . (FSM) corresponding to the DUV. An . (EA) is applied to get high quality results. Experiments are given to demonstrate the efficiency of the approach.
作者: Cupidity    時(shí)間: 2025-3-28 08:33
A Switched Opamp Based 10 Bits Integrated ADC for Ultra Low Power Applications,olution is 10 b, its typical operating clock frequency is 32 kHz (sampling rate is 2.9 kSamples/s) and it is able to reach the same resolution at 2 V, with 0.7 kSamples/s sampling rate, showing a dissipation of 1 μW for the analog part and 1.3 μW for the digital part. Moreover, it is also characterized by low offset and no missing codes.
作者: HEW    時(shí)間: 2025-3-28 10:47
Exploring the Capabilities of Reconfigurable Hardware for OFDM-Based Wlans, (.rthogonal .requency .ivision .ultiplexing). By making use of special characteristics of packet-based WLANs and standard specifications, functional blocks of an OFDM receiver can be mapped on the same hardware. Even performance enhancements can be achieved without any additional hardware.
作者: Keratin    時(shí)間: 2025-3-28 15:30
Software-Based Test for Nonprogrammable Cores in Bus-Based System-On-Chip Architectures, test uses an embedded processor as source and sink of the test, sending the test patterns and reading the responses. A new integrated design and test environment has been developed to automatically synthesize test programs to test non-programmable cores of SoCs. Some benchmarks ISCAS85 and ISCAS89 are used to evaluate the proposed methodology.
作者: 廢墟    時(shí)間: 2025-3-28 22:30
Jo?o M. S. Silva,Luís Miguel Silveiraent techniques and several compression algorithms on a quite large document collection composed by about six million documents. The results are very encouraging since we can improve the compression ratio up to 40% using an algorithm that takes about ninety seconds to finish using only 100 MB of main memory.
作者: graphy    時(shí)間: 2025-3-29 02:10

作者: 處理    時(shí)間: 2025-3-29 04:21
Dominique Borrione,Menouer Boubekeur,Laurent Mounier,Marc Renaudin,Antoine Sirianition is generated with an advanced image captioning model trained on an external dataset. Consequently, the retrieval model obtains transferred knowledge from the external dataset. Extensive experiments prove the efficiency of this approach on a benchmark dataset compared to state-of-the-art approaches.
作者: diskitis    時(shí)間: 2025-3-29 11:01
José Augusto M. Nacif,Claudionor Nunes Coelho Jr.,Harry Foster,Flávio Miana de Paula,Edjard Mota,Márg a number of machine-learned blending algorithms, which differ by the sets of used features. Thus we not only measure the value of personalized approach in the aggregated search context, but also find out which classes of personalized features outperform the others.
作者: harbinger    時(shí)間: 2025-3-29 12:16

作者: 易彎曲    時(shí)間: 2025-3-29 16:45

作者: amorphous    時(shí)間: 2025-3-29 22:14
Automated Conversion of SystemC Fixed-Point Data Types,n implemented. The article describes the theory and transformation rules of the conversion methodology, their implementation into a tool solution, and its application in terms of an experimental case study.
作者: 顯微鏡    時(shí)間: 2025-3-30 02:37
On-Chip Property Verification Using Assertion Processors,loyed designs. Extending white-box verification techniques to deployed products helps locate errors that were not found during simulation / emulation phases. We present results of the insertion of assertion checkers and an assertion processor in an 8-Bit processor and a communication core.
作者: 充氣女    時(shí)間: 2025-3-30 05:41

作者: concentrate    時(shí)間: 2025-3-30 10:50
Evaluation Methodology for Single Electron Encoded Threshold Logic Gates,tes. Furthermore, we discuss the implications of the proposed methodology on practical networks of such gates. We estimate that buffered threshold gates operating at room temperature can potentially switch with a delay of 6 ps and have a packing density of 10. gates per ...
作者: Osteoporosis    時(shí)間: 2025-3-30 13:36

作者: 蠟燭    時(shí)間: 2025-3-30 16:36

作者: maroon    時(shí)間: 2025-3-30 21:22

作者: 護(hù)身符    時(shí)間: 2025-3-31 02:05
Automated Conversion of SystemC Fixed-Point Data Types,ulation acceleration and hardware synthesis. In most design flows the direct synthesis of fixed-point data types and their related arithmetics is not supported. Thus all fixed-point arithmetics have to be converted manually in a very time-consuming and error-prone procedure. Therefore a conversion m
作者: 性學(xué)院    時(shí)間: 2025-3-31 07:33

作者: 個(gè)人長篇演說    時(shí)間: 2025-3-31 12:39
Validation of Asynchronous Circuit Specifications Using IF/CADP,eld of distributed software. CHP specifications are translated into an intermediate format (IF) based on communicating extended finite state machines. They are then validated using the IF environment, which provides model checking and bi-simulation tools.
作者: Permanent    時(shí)間: 2025-3-31 15:16
On-Chip Property Verification Using Assertion Processors, the failure to the I/O pins. White-box verification in chip level designs can be implemented using assertion checkers to ensure the correct behavior of a design. With chip gate counts growing exponentially, today’s verification techniques, such as white-box, can not always ensure a bug free design.
作者: 稱贊    時(shí)間: 2025-3-31 20:09
Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems, fulfillment of given real-time constraints are central. Moreover, the detailed evaluation and measurement of the power consumption situation during this dynamic reconfiguration process is essential for realistically quantifying the power loss of fine-grain FPGAs during dynamic reconfiguration proce
作者: 遍及    時(shí)間: 2025-4-1 00:22
A Switched Opamp Based 10 Bits Integrated ADC for Ultra Low Power Applications,ions. The AID converter shows a typical operating power consumption of 8.18 μW for the analog part and of 9.71 μW for the digital one, whereas the stand by dissipation is about 1 nW and 5 nW, respectively, (measured on 10 chip samples and averaged), considering a typical supply of 2.8 V. The ADC res
作者: tolerance    時(shí)間: 2025-4-1 01:53

作者: 使痛苦    時(shí)間: 2025-4-1 09:22
Software-Based Test for Nonprogrammable Cores in Bus-Based System-On-Chip Architectures,tion. Hardware-based test may reduce the ATE dependency. However, hardware-based test imposes some constraints like area overhead and processing speed degradation. The main objective of this work is to investigate and evaluate a less intrusive test approach called software-based test. Software-based
作者: enormous    時(shí)間: 2025-4-1 13:44
Optimizing SOC Test Resources Using Dual Sequences,d annealing based procedure to optimize the SOC test application time and tester resources. The problems we consider are generation of optimal test schedules for SOCs and minimizing tester memory and test channels. Results of experiments conducted on ITC’02 benchmark SOCs show the effectiveness of t
作者: 譏笑    時(shí)間: 2025-4-1 16:49





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