派博傳思國際中心

標(biāo)題: Titlebook: System and Architecture; Proceedings of CSI 2 Sunil Kumar Muttoo Conference proceedings 2018 Springer Nature Singapore Pte Ltd. 2018 Hardwa [打印本頁]

作者: 鳴叫大步走    時(shí)間: 2025-3-21 17:47
書目名稱System and Architecture影響因子(影響力)




書目名稱System and Architecture影響因子(影響力)學(xué)科排名




書目名稱System and Architecture網(wǎng)絡(luò)公開度




書目名稱System and Architecture網(wǎng)絡(luò)公開度學(xué)科排名




書目名稱System and Architecture被引頻次




書目名稱System and Architecture被引頻次學(xué)科排名




書目名稱System and Architecture年度引用




書目名稱System and Architecture年度引用學(xué)科排名




書目名稱System and Architecture讀者反饋




書目名稱System and Architecture讀者反饋學(xué)科排名





作者: 異端邪說下    時(shí)間: 2025-3-21 23:34
Low-Power High-Performance Multitransform Architecture Using Run-Time Reconfigurable Adder for FPGAs used in the 2D CSDA-MST core to analyse computation speed and power consumption. The proposed adder is evaluated with 12-bit and 16-bit input length. The calculated result shows that 21.6 and 16.25% of active logic gate reduce for 12-bit and 16-bit adder, respectively. Also, synthesized result of
作者: Hemodialysis    時(shí)間: 2025-3-22 04:23

作者: 上釉彩    時(shí)間: 2025-3-22 04:49
LVCMOS-Based Low-Power Thermal-Aware Energy-Proficient Vedic Multiplier Design on Different FPGAs,minution in Leakage control of Vedic multiplier at constant temperature of 20?°C, for LVCMOS_15, as the Vedic multiplier intent is moved from 45 to 90-nm intent, there is 89.54% diminution in Leakage control of Vedic multiplier at constant temperature of 30?°C.
作者: ETHER    時(shí)間: 2025-3-22 12:19
Development of Cross-Toolchain and Linux Device Driver,performance. Because of reminiscence obstacles, embedded working programs are commonly written in meeting language, however for some excessive-finish hardware, some of them are additionally written in additional transportable languages, like C.
作者: graphy    時(shí)間: 2025-3-22 16:40
s book is targeted at late undergraduate to early graduate university students, and researchers of programming methodologies. Vol. 1of this series is a prerequisite text..978-3-642-05940-7978-3-540-33193-3Series ISSN 1862-4499 Series E-ISSN 1862-4502
作者: 鞏固    時(shí)間: 2025-3-22 19:59

作者: 設(shè)想    時(shí)間: 2025-3-22 21:58

作者: FLAX    時(shí)間: 2025-3-23 01:49
Pankaj R. Sawarkar,Akhilesh A. Nimje,Praful P. Kumbhares book is targeted at late undergraduate to early graduate university students, and researchers of programming methodologies. Vol. 1of this series is a prerequisite text..978-3-642-05940-7978-3-540-33193-3Series ISSN 1862-4499 Series E-ISSN 1862-4502
作者: archetype    時(shí)間: 2025-3-23 06:13
Amit Sharma,Sansar Chand,Navneet GillThe reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro978-3-642-05941-4978-3-540-33653-2Series ISSN 1862-4499 Series E-ISSN 1862-4502
作者: 從屬    時(shí)間: 2025-3-23 12:14
Lohini Walia,Gaurav Walia,Umesh Pal SinghThe reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro978-3-642-05941-4978-3-540-33653-2Series ISSN 1862-4499 Series E-ISSN 1862-4502
作者: CHARM    時(shí)間: 2025-3-23 15:51

作者: 膽汁    時(shí)間: 2025-3-23 21:06
K. Sivanandam,P. KumarThe reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro978-3-642-05941-4978-3-540-33653-2Series ISSN 1862-4499 Series E-ISSN 1862-4502
作者: Harbor    時(shí)間: 2025-3-24 00:03

作者: 畫布    時(shí)間: 2025-3-24 02:47

作者: monopoly    時(shí)間: 2025-3-24 09:10

作者: 山崩    時(shí)間: 2025-3-24 14:07

作者: Admonish    時(shí)間: 2025-3-24 15:01

作者: MIR    時(shí)間: 2025-3-24 21:03

作者: endocardium    時(shí)間: 2025-3-25 02:22
Shabana Urooj,Abeer Z. AlalmaieThe reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro978-3-642-05941-4978-3-540-33653-2Series ISSN 1862-4499 Series E-ISSN 1862-4502
作者: 烤架    時(shí)間: 2025-3-25 06:09
Zaki Ahmad Khan,Jamshed Siddiqui,Abdus Samadrements expectations, and how one validates and verifies domain and requirements models...The reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro
作者: Dorsal-Kyphosis    時(shí)間: 2025-3-25 10:13
Tarun Agrawal,Vivek Srivastavarements expectations, and how one validates and verifies domain and requirements models...The reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro
作者: fringe    時(shí)間: 2025-3-25 13:34
Arushi Aggarwal,Bishwajeet Pandey,Sweety Dabbas,Achal Agarwal,Siddharth Saurabhrements expectations, and how one validates and verifies domain and requirements models...The reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro
作者: 擴(kuò)張    時(shí)間: 2025-3-25 19:48
Arushi Aggarwal,Bishwajeet Pandey,Sweety Dabbas,Achal Agarwal,Siddharth Saurabhrements expectations, and how one validates and verifies domain and requirements models...The reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro
作者: Explicate    時(shí)間: 2025-3-25 20:03
Himanshu Verma,Gaurav Verma,Jaswanth Yarlagadda,Ashish Sharma,Sandeep Banarwalrements expectations, and how one validates and verifies domain and requirements models...The reader can take an informal route through Vol. 3, and this would be suitable for undergraduate courses on software engineering. Advanced students, lecturers, and researchers may instead follow the formal ro
作者: cardiovascular    時(shí)間: 2025-3-26 03:48

作者: 教育學(xué)    時(shí)間: 2025-3-26 05:04
978-981-10-8532-1Springer Nature Singapore Pte Ltd. 2018
作者: extract    時(shí)間: 2025-3-26 09:12

作者: 不給啤    時(shí)間: 2025-3-26 16:13

作者: Rotator-Cuff    時(shí)間: 2025-3-26 17:36
https://doi.org/10.1007/978-981-10-8533-8Hardware; Computer Organization; System Architectures; Microprogramming; CSI 2015; Digital Life
作者: contrast-medium    時(shí)間: 2025-3-26 22:40
,Design and Simulation of OTA Using 45?nm Technology,OTA is very popular in electronics industry due to its large number of applications. Double gate MOSFETs are strong contenders for nanoscale region due to its better control over SCEs. In this paper, emphasis is to design low power, better phase margin OTA using double gate MOSFETs. The simulations are done at 45?nm technology.
作者: Panacea    時(shí)間: 2025-3-27 02:40
Sunil Kumar MuttooCovers the most important, pervasive, top-level, strategic inventions, decisions, and their associated rationales about the overall structure and associated characteristics and behaviour.Provides an u
作者: AMITY    時(shí)間: 2025-3-27 05:23

作者: Blasphemy    時(shí)間: 2025-3-27 10:33
L. K. Gautam,S. A. Ladhakeents in software engineering.Emphasis on presenting applicat.The art, craft, discipline, logic, practice and science of developing large-scale software products needs a professional base. The textbooks in this three-volume set combine informal, engineeringly sound approaches with the rigor of formal
作者: nurture    時(shí)間: 2025-3-27 15:11
Taniya Aggarwal,Saurabh Khatri,Anu Singlaents in software engineering.Emphasis on presenting applicat.The art, craft, discipline, logic, practice and science of developing large-scale software products needs a professional base. The textbooks in this three-volume set combine informal, engineeringly sound approaches with the rigor of formal
作者: 輕觸    時(shí)間: 2025-3-27 20:21

作者: Semblance    時(shí)間: 2025-3-28 00:50

作者: 奴才    時(shí)間: 2025-3-28 02:10

作者: 史前    時(shí)間: 2025-3-28 09:20

作者: 豎琴    時(shí)間: 2025-3-28 12:39

作者: AVOID    時(shí)間: 2025-3-28 18:21

作者: Fulsome    時(shí)間: 2025-3-28 18:57
Zaki Ahmad Khan,Jamshed Siddiqui,Abdus Samadooks in this three-volume set combine informal, engineeringly sound practice with the rigour of formal, mathematics-based approaches...Volume 3 is based on the maxim: "Before software can be designed its requirements must be well understood, and before the requirements can be expressed properly the
作者: 切割    時(shí)間: 2025-3-28 23:15
Tarun Agrawal,Vivek Srivastavaooks in this three-volume set combine informal, engineeringly sound practice with the rigour of formal, mathematics-based approaches...Volume 3 is based on the maxim: "Before software can be designed its requirements must be well understood, and before the requirements can be expressed properly the
作者: 向下五度才偏    時(shí)間: 2025-3-29 06:57
Arushi Aggarwal,Bishwajeet Pandey,Sweety Dabbas,Achal Agarwal,Siddharth Saurabhooks in this three-volume set combine informal, engineeringly sound practice with the rigour of formal, mathematics-based approaches...Volume 3 is based on the maxim: "Before software can be designed its requirements must be well understood, and before the requirements can be expressed properly the
作者: ticlopidine    時(shí)間: 2025-3-29 07:42

作者: HACK    時(shí)間: 2025-3-29 14:54

作者: Credence    時(shí)間: 2025-3-29 18:17

作者: 禁止,切斷    時(shí)間: 2025-3-29 20:52
Inderpreet Kaur,Lakshay Rohilla,Alisha Nagpal,Bishwajeet Pandey,Sanchit Sharmaents in software engineering.Emphasis on presenting applicat.The art, craft, discipline, logic, practice, and science of developing large-scale software products needs a believable, professional base. The textbooks in this three-volume set combine informal, engineeringly sound practice with the rigo
作者: hallow    時(shí)間: 2025-3-30 02:13
Himanshu Verma,Gaurav Verma,Jaswanth Yarlagadda,Ashish Sharma,Sandeep Banarwalooks in this three-volume set combine informal, engineeringly sound practice with the rigour of formal, mathematics-based approaches...Volume 3 is based on the maxim: "Before software can be designed its requirements must be well understood, and before the requirements can be expressed properly the
作者: 故意    時(shí)間: 2025-3-30 04:31

作者: 抵制    時(shí)間: 2025-3-30 12:02
Saumil Sachdeva,Sarthak Chowdhury,Sushant Shekhar,Gaurav Vermaents in software engineering.Emphasis on presenting applicat.The art, craft, discipline, logic, practice, and science of developing large-scale software products needs a believable, professional base. The textbooks in this three-volume set combine informal, engineeringly sound practice with the rigo
作者: Incorruptible    時(shí)間: 2025-3-30 13:13

作者: 周興旺    時(shí)間: 2025-3-30 17:40
A Mathematical AI-Based Diet Analysis and Transformation Model,alanced diet is essential from the very early stages of life for proper growth, development, to remain active and to reduce the risk of diseases. For those with diabetes, a proper diabetes diet is crucial which depends upon their energy requirements. So a need has been identified to develop educatio
作者: 厭倦嗎你    時(shí)間: 2025-3-30 22:16
Energy Efficient Measures for Sustainable Development of Data Centers,orage, multimedia, computation, communication, and information, there is a need felt for setting up and maintaining the data centers. Data centers now are the biggest consumers of energy of the IT industry. The energy cost is the most driving factor of data centers. In extend to investment and maint
作者: set598    時(shí)間: 2025-3-31 04:04
,Analysis on Multiple Combinations of Series–Parallel Connections of Super Capacitors for Maximum Enons within ultra capacitor units supplying energy to load in efficient way. This reconfiguration dealt with series–parallel connections with reference of load voltage maximum and minimum limit. By using proper switching, 99% of stored energy can be delivered to load in minimum time. In normal case,
作者: BARB    時(shí)間: 2025-3-31 08:28

作者: Estimable    時(shí)間: 2025-3-31 10:24

作者: ARENA    時(shí)間: 2025-3-31 13:41
Low-Power High-Performance Multitransform Architecture Using Run-Time Reconfigurable Adder for FPGAltimedia communications. The CSDA and multitransform architecture have more number of 12-bit and 16-bit adders. In real-time computation, more redundant input data present in the most significant bit (MSB) part. So, in this paper, a detector logic circuit is developed to distinguish unwanted and inf
作者: semble    時(shí)間: 2025-3-31 20:52
A Review of Dynamic Scheduling Algorithms for Homogeneous and Heterogeneous Systems, as scheduling length, execution time, load imbalance factor?and many more. Over the time, many dynamic scheduling policies were introduced which are designed to achieve their goal such as efficient utilization of process elements, minimization of resources idleness, or determining the total executi
作者: ordain    時(shí)間: 2025-4-1 00:51
Effective Information Retrieval Algorithm for Linear Multiprocessor Architecture,such as textual, numeric and image formats. A number of applications can be downloaded in parallel by several servers available on net using downloading applications. These applications may vary depending upon the mechanism used to improve to downloading time. One of the methods to speedup downloadi
作者: 使更活躍    時(shí)間: 2025-4-1 02:01
Design of Energy-Efficient Random Access Memory Circuit Using Low-Voltage CMOS and High-Speed Transnd HSTL-I families are compared for finding the maximum power-efficient IO standards between them. We tested 64-bit RAM circuit at different range of frequencies of Intel Processor that are at Intel I-3 5005U 2.0?GHz, Intel I-3, 5015U 2.1?GHz, Intel I-3 5157U 2.5?GHz, Intel I-5 3380M 2.9?GHz, Intel
作者: MOT    時(shí)間: 2025-4-1 06:16
Stub Series Terminal Logic-Based Low-Power Thermal-Aware Vedic Multiplier Design on 40-nm FPGA, The paper presents the proficiency of Antyayor Dasakepi Vedic technique for multiplication that strikes a disparity in the real procedure of multiplication by itself. It allows comparable production of biased products and eliminates unnecessary steps of multiplication. The projected algorithm is re
作者: MUMP    時(shí)間: 2025-4-1 11:27

作者: integral    時(shí)間: 2025-4-1 15:08
Timing Constraints-Based High-Performance DES Design and Implementation on 28-nm FPGA,imum frequency, minimum low pulse, minimum high pulse for different cases of worst-case slack, maximum delay, setup time, hold time, and data skew path. The cases on which analysis is done are like worst-case slack, best-case achievable, timing error, and timing score, which help in differentiating
作者: 大氣層    時(shí)間: 2025-4-1 21:11

作者: progestin    時(shí)間: 2025-4-2 00:17
Different Configuration of Low-Power Memory Design Using Capacitance Scaling on 28-nm Field-Programcaling-based low-power RAM design. Our work aims to analyze how the memory circuit works using capacitance scaling does and varying temperatures. This design is implemented in Verilog. Usually, for the functioning of a device, the junction temperature is below 125?°C. If we scale down frequency from
作者: 雀斑    時(shí)間: 2025-4-2 06:00
Ardudroid Surveillance Bot,own incredible range of possible applications. Manipulation of latest robot which knows how to be proscribed using an android application should be in reach. Through this work, a robot is developed which is based on android phones that could be the basic prototype for the ground surveillance robot.
作者: SNEER    時(shí)間: 2025-4-2 09:12

作者: 無法破譯    時(shí)間: 2025-4-2 14:41

作者: 死貓他燒焦    時(shí)間: 2025-4-2 18:02

作者: Pigeon    時(shí)間: 2025-4-2 22:01
Design and Analysis of Microstrip Patch Antenna Using DRAF,sis of antenna’s performance characteristics, a comparable analysis is obtained for both the patch antennas. The results after simulation using the software HFSS demonstrates that both the designed antennas depict relatively good radiation pattern as compared to conventional antennas.
作者: curettage    時(shí)間: 2025-4-3 00:05
Design of Energy-Efficient Random Access Memory Circuit Using Low-Voltage CMOS and High-Speed TransI-5 3340U 3.1?GHz, and Intel I-7 3370K 3.5?GHz frequency range to find the most power-efficient circuit. When we migrate our design to LVCMOS from HSTL, then there is 40–60% saving in power dissipation of memory circuits.




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