標題: Titlebook: Embedded Computer Systems: Architectures, Modeling, and Simulation; 22nd International C Alex Orailoglu,Marc Reichenbach,Matthias Jung Conf [打印本頁] 作者: Coronary-Artery 時間: 2025-3-21 16:14
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書目名稱Embedded Computer Systems: Architectures, Modeling, and Simulation被引頻次
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作者: Flagging 時間: 2025-3-21 21:10 作者: Exposition 時間: 2025-3-22 04:14
EasyHBM: Simple and?Fast HBM Access for?FPGAs Using High-Level-Synthesistime-to-market than traditional RTL designs. HLS also allows developers with less in-depth hardware design knowledge to employ FPGA accelerators for their applications. However, like traditional CPUs, these designs often suffer from an insufficient memory bandwidth to provide data to all computation作者: 悅耳 時間: 2025-3-22 04:43 作者: SLING 時間: 2025-3-22 08:56 作者: muffler 時間: 2025-3-22 15:05
Tagged Geometric History Length Access Interval Prediction for?Tightly Coupled Memory Systemsefficiency and software flexibility. On the one hand, memory sharing improves area utilization, but on the other hand, this can lead to a performance degradation due to an increase in access conflicts. To mitigate the associated performance penalty, access interval prediction (AIP) has been proposed作者: muffler 時間: 2025-3-22 18:50 作者: Substance-Abuse 時間: 2025-3-22 22:11 作者: Peak-Bone-Mass 時間: 2025-3-23 05:17 作者: 過時 時間: 2025-3-23 09:29 作者: narcissism 時間: 2025-3-23 13:00 作者: thrombosis 時間: 2025-3-23 17:29
Study of?DNN-Based Ragweed Detection from?Dronesom strong allergic reactions to its pollen. This work studies the use of aerial drones equipped with highly compressed deep neural networks (DNNs) to scan large areas of vegetation for ragweed with high speed and precision. Compared to the manual approaches with an estimated survey cost of roughly 8作者: gimmick 時間: 2025-3-23 20:10 作者: 冰河期 時間: 2025-3-23 22:48 作者: 有害 時間: 2025-3-24 03:03 作者: predict 時間: 2025-3-24 06:58
https://doi.org/10.1007/978-3-658-15879-8n the field of general digital hardware design. A dedicated hardware implementation of a Synthetic Aperture Radar (SAR) processing algorithm is used as an example case for a real-world application. It is targeting a modern high performance FPGA platform. We analyze the difference in code size compar作者: RENIN 時間: 2025-3-24 14:06 作者: 女上癮 時間: 2025-3-24 18:43
,Nutzererleben und Bedürfnisse,ce and are therefore suitable candidates to use with approximate memories. Although the error resilience of neural networks has been considered in many studies, tree-based applications have received less attention. In addition, there is no tool available to specifically evaluate the error resilience作者: Culmination 時間: 2025-3-24 21:24 作者: critique 時間: 2025-3-25 00:29 作者: MOT 時間: 2025-3-25 06:46
Zur Begründung eines Rahmenkonzeptsgy budgets. By intelligent power management and power gating strategies for the main microcontroller of the system, the energy efficiency can be significantly increased. However, timer-based, periodical power-up sequences are too inflexible to implement these strategies, and the use of a programmabl作者: visceral-fat 時間: 2025-3-25 10:16 作者: endure 時間: 2025-3-25 12:34
Diskussion, Ausblick und Fazit,P-hard problem, and some information might not be present in the software implementation at all (e.g., intentions of synchronisation). Existing approaches for finding concurrency bugs use over-approximating analyses and testing, but these respectively often lead to potential false warnings or fail t作者: arbovirus 時間: 2025-3-25 17:40
https://doi.org/10.1007/978-3-531-94228-5an ability to simulate EM fields during software development rather than relying on expensive lab-based measurements. We propose a modeling approach capable of synthesizing instruction-level EM traces for arbitrary software, using a one-time pre-characterization of a processor. Reducing the cost of 作者: expound 時間: 2025-3-25 20:48 作者: 粗野 時間: 2025-3-26 01:13 作者: collagen 時間: 2025-3-26 06:57
Theoretische Perspektiven zur Medienlogik,-Low-Power (ULP) microcontroller units (MCUs). To this aim, we present a framework, based on ., to deploy DNN training tasks on RISC-V-based Parallel-ULP (PULP) MCUs. . is a library of parallel software DNN primitives enabling the execution of forward and backward steps on PULP MCUs. To optimize .’s作者: jungle 時間: 2025-3-26 11:58
https://doi.org/10.1007/978-3-031-15074-6artificial intelligence; computer hardware; computer networks; computer programming; computer science; co作者: Sinus-Rhythm 時間: 2025-3-26 15:00
978-3-031-15073-9The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerl作者: 機械 時間: 2025-3-26 19:40
Embedded Computer Systems: Architectures, Modeling, and Simulation978-3-031-15074-6Series ISSN 0302-9743 Series E-ISSN 1611-3349 作者: NAV 時間: 2025-3-26 22:28
Conference proceedings 2022MOS 2021, which took place in July 2022 in Samos, Greece.. The 21 full papers presented in this volume were carefully reviewed and selected from 44 submissions. The papers are organized in topics as follows: High level synthesis; memory systems; processor architecture; embedded software systems and 作者: 牽連 時間: 2025-3-27 02:01 作者: 密碼 時間: 2025-3-27 07:46
Problemstellung und Zielsetzung,ardware metrics analysis of ISO?26262 with SystemC-based virtual prototyping. To show the applicability of our methodology, we modeled the LPDDR4 memory system of a current state-of-the-art ADAS system and estimated the ASIL level of this system. The new methodology is implemented in SystemC and is provided as open-source.作者: ABHOR 時間: 2025-3-27 10:43 作者: BRINK 時間: 2025-3-27 15:39
https://doi.org/10.1007/978-3-531-94228-5EM emanations with less than 5% mean absolute percentage error (MAPE) compared to measurements. Furthermore, synthesized traces predict control flow leakage with an accuracy of 87% or more based on the side-channel vulnerability factor (SVF) metric.作者: 剝皮 時間: 2025-3-27 21:31 作者: 大笑 時間: 2025-3-27 21:56
High-Level Simulation of?Embedded Software Vulnerabilities to?EM Side-Channel AttacksEM emanations with less than 5% mean absolute percentage error (MAPE) compared to measurements. Furthermore, synthesized traces predict control flow leakage with an accuracy of 87% or more based on the side-channel vulnerability factor (SVF) metric.作者: Cerumen 時間: 2025-3-28 04:06 作者: 荒唐 時間: 2025-3-28 08:31 作者: 石墨 時間: 2025-3-28 12:22 作者: 有幫助 時間: 2025-3-28 16:46 作者: 原來 時間: 2025-3-28 20:39 作者: Anecdote 時間: 2025-3-28 23:46 作者: 長處 時間: 2025-3-29 05:37
TREAM: A Tool for?Evaluating Error Resilience of?,e-Based Models Using ,pproximate ,emorytion into the aforementioned parameters. Based on this, we construct a set of experiments using TREAM for different random forest structures and datasets over a set of bit error rates, where the relation between accuracy and bit error rate is considered for error resilience. The results demonstrate 作者: 跳動 時間: 2025-3-29 11:06 作者: 無法取消 時間: 2025-3-29 14:09
ControlPULP: A RISC-V Power Controller for?HPC Processors with?Parallel Control-Law Computation Accester system with a specialized DMA engine and a fast multi-core interrupt controller for parallel acceleration of real-time power management policies. ControlPULP relies on a real-time OS (FreeRTOS) to schedule a Power Control Firmware (PCF) software layer. We evaluate ControlPULP design choices in 作者: 開始從未 時間: 2025-3-29 17:50 作者: 草率男 時間: 2025-3-29 22:27
A Design Space Exploration Methodology for Enabling Tensor Train Decomposition in Edge Devicesstically pruned by removing inefficient solutions. Our experimental results prove that it is possible to output a limited set of solutions with better accuracy, memory, and FLOPs compared to the original (non-factorized) model. Our methodology has been developed as a standalone, parameterized module作者: 無目標 時間: 2025-3-30 02:28
Study of?DNN-Based Ragweed Detection from?Dronesectivity. To overcome these challenges, we train state-of-the-art object detection and segmentation models on a ragweed dataset. The best performing segmentation models were compressed using shunt connections, fine-tuned with knowledge distillation, and further optimized with Nvidias TensorRT librar作者: CRANK 時間: 2025-3-30 05:33
