標(biāo)題: Titlebook: Distributed and Parallel Embedded Systems; IFIP WG10.3/WG10.5 I Franz J. Rammig Book 1999 IFIP International Federation for Information Pro [打印本頁] 作者: 淹沒 時間: 2025-3-21 18:59
書目名稱Distributed and Parallel Embedded Systems影響因子(影響力)
書目名稱Distributed and Parallel Embedded Systems影響因子(影響力)學(xué)科排名
書目名稱Distributed and Parallel Embedded Systems網(wǎng)絡(luò)公開度
書目名稱Distributed and Parallel Embedded Systems網(wǎng)絡(luò)公開度學(xué)科排名
書目名稱Distributed and Parallel Embedded Systems被引頻次
書目名稱Distributed and Parallel Embedded Systems被引頻次學(xué)科排名
書目名稱Distributed and Parallel Embedded Systems年度引用
書目名稱Distributed and Parallel Embedded Systems年度引用學(xué)科排名
書目名稱Distributed and Parallel Embedded Systems讀者反饋
書目名稱Distributed and Parallel Embedded Systems讀者反饋學(xué)科排名
作者: GEON 時間: 2025-3-21 22:09 作者: Basilar-Artery 時間: 2025-3-22 02:40
978-1-4757-5006-5IFIP International Federation for Information Processing 1999作者: 空中 時間: 2025-3-22 06:16
Distributed and Parallel Embedded Systems978-0-387-35570-2Series ISSN 1868-4238 Series E-ISSN 1868-422X 作者: 過多 時間: 2025-3-22 12:13
The Commonwealth of the Bahamas the necessary design tasks required to map an abstract executable specification of the system to the architectural implementation model. We also describe the final and intermediate models generated as a result of these design tasks. The executable specification and its refinements should support easy insertion and reuse of IPs.作者: 玩笑 時間: 2025-3-22 16:56
Reigning Queen, Head of the Commonwealthto come from a synchronous Statechart specification to an asynchronous, distributed implementation. Synchronous in this context means that these specifications are based on the assumption that all ist subcomponents interact synchronously with a global clock and in addition perfect synchronous ‘a(chǎn) la Berry.作者: 玩笑 時間: 2025-3-22 18:19
The Statesman‘s Year-Book 1973-74 specialists, each of them working on one single part of the whole system. But the focus in design is not only more functionality and higher performance but also safety and reliability criteria that have to be fulfilled by the designed components. This includes functional requirements as well as real-time constraints.作者: Mangle 時間: 2025-3-23 00:56 作者: Altitude 時間: 2025-3-23 05:06 作者: 無畏 時間: 2025-3-23 07:05
https://doi.org/10.1057/9780230252981ble component models with clearly defined interfaces. The design of a whole application model is obtained by using these components and the resulting global model can be simulated for the verification of temporal properties and for the optimization of an implementation.作者: 易受騙 時間: 2025-3-23 13:21
IP-Centric Methodology and Specification Language the necessary design tasks required to map an abstract executable specification of the system to the architectural implementation model. We also describe the final and intermediate models generated as a result of these design tasks. The executable specification and its refinements should support easy insertion and reuse of IPs.作者: Merited 時間: 2025-3-23 16:40 作者: Asparagus 時間: 2025-3-23 21:04 作者: 身體萌芽 時間: 2025-3-24 02:02
From MSCS to Statechartsequirements, captured in the early system analysis phase using MSCS, are translated into state-based description techniques like Statecharts. To this end, we sketch a schematic integration of MSCS and Statecharts.作者: habitat 時間: 2025-3-24 03:50 作者: 拱形大橋 時間: 2025-3-24 09:56 作者: OASIS 時間: 2025-3-24 11:30 作者: Pde5-Inhibitors 時間: 2025-3-24 17:38 作者: 設(shè)想 時間: 2025-3-24 20:22 作者: 擦試不掉 時間: 2025-3-25 02:52
The Statesman‘s Year-Book 1973-74 specialists, each of them working on one single part of the whole system. But the focus in design is not only more functionality and higher performance but also safety and reliability criteria that have to be fulfilled by the designed components. This includes functional requirements as well as rea作者: Absenteeism 時間: 2025-3-25 04:44
https://doi.org/10.1057/9780230271029equirements, captured in the early system analysis phase using MSCS, are translated into state-based description techniques like Statecharts. To this end, we sketch a schematic integration of MSCS and Statecharts.作者: 憤怒歷史 時間: 2025-3-25 10:41
The Statesman‘s Year-Book 1973-74modeled and simulated at a high level. Automatic translation from the abstract models into implementations significantly reduces overall development time. This paper contributes to the optimized code generation from statechart models. The worst-case execution time of the generated code is reduced.作者: 我不重要 時間: 2025-3-25 14:38
Cayman, Turks and Caicos Islandsic scheduling for parallel and distributed execution. Fine-grain scheduling decisions are made at compile time, and coarse-grain scheduling decisions are made at run time. The approach consists of two components: compiler technology which performs the static analysis (thread extraction), and an arch作者: prostatitis 時間: 2025-3-25 16:05
https://doi.org/10.1057/9780230252981rease. One example is a series hybrid vehicle. It consists of an auxiliary power unit, e.g,. an internal combustion engine, and a generator coupled to the crank shaft of the combustion engine, a battery and a drive unit with two electric motors. Each of these vehicle units has its own electronic con作者: 節(jié)約 時間: 2025-3-25 21:48
https://doi.org/10.1057/9780230252981vironments, complex and reactive sensing-perception-action systems are necessary. Many of these models were already developed and/or are subject of current research (Mertsching, et al., 1997), (Wasson, et al., 1998). On the other hand, questions on how these models can be integrated into the softwar作者: refine 時間: 2025-3-26 02:18
https://doi.org/10.1057/9780230252981ta oriented systems, and model checking of temporal logics is usually used for the verification of control dominated systems. While theorem proving is an inherently interactive verification method, model checking is performed automatically..In this paper, we investigate for the verification of algor作者: jeopardize 時間: 2025-3-26 07:02
https://doi.org/10.1057/9780230252981ble component models with clearly defined interfaces. The design of a whole application model is obtained by using these components and the resulting global model can be simulated for the verification of temporal properties and for the optimization of an implementation.作者: 相互影響 時間: 2025-3-26 10:00
https://doi.org/10.1057/9780230252981istributed signal processing software application. SDL, for Specification and Description Language (ITU-Z100, 1996), is a design notation that uses blocks to describe the system structure, those blocks exchange messages through communication channels, and the dynamic behavior in the leaf blocks is d作者: 從容 時間: 2025-3-26 16:14
https://doi.org/10.1057/9780230252981d in the area of Rapid Controller Prototyping and Hardware-in-the-Loop simulations, where high-end computing power is required that can not be realized on a single CPU. Typical users are control engineers who are not too familiar with the details of multiprocessor hardware, distributed real-time ker作者: 雜色 時間: 2025-3-26 20:24
https://doi.org/10.1057/9780230252981This paper presents an approach to a new software platform for distributed hardware-in-the-loop simulation applied to mechatronic systems.作者: 原始 時間: 2025-3-27 00:33
Distributed HIL Simulation of Mechatronic Systems Applied to an Agricultural MachineThis paper presents an approach to a new software platform for distributed hardware-in-the-loop simulation applied to mechatronic systems.作者: 可互換 時間: 2025-3-27 04:15
Extended SDL-Based Tools for Rapid Prototyping of Application Specific Signal Processorsocks to describe the system structure, those blocks exchange messages through communication channels, and the dynamic behavior in the leaf blocks is described by means of extended finite state machines.作者: 爭論 時間: 2025-3-27 07:33 作者: 分期付款 時間: 2025-3-27 12:11
https://doi.org/10.1057/9780230252981ithms for computing the discrete cosine transform by means of term rewriting and model checking. We show the advantages and disadvantages of both approaches at different abstraction levels of the design.作者: 我的巨大 時間: 2025-3-27 15:38 作者: Arthr- 時間: 2025-3-27 20:32
https://doi.org/10.1057/9780230252981 be used not only for the purpose of reaching real time, but also for structuring purposes. The aim of mechatronics is the overall design of those systems. A toolset which supports the distributed HIL simulation as part of the mechatronic design cycle will be presented.作者: bromide 時間: 2025-3-28 01:09 作者: 否決 時間: 2025-3-28 02:25 作者: SSRIS 時間: 2025-3-28 08:15 作者: 聯(lián)想記憶 時間: 2025-3-28 12:31
Block Diagram Based Real-Time Simulation on a Network of Alpha Processors and C40 DSPSnels, and parallel programming. Therefore RTI-MP is based on an intuitive graphical representation of the multiprocessor system in form of a Simulink block diagram, which is well known to control engineers. The simulation model is implemented fully automatical on a network of DEC Alpha processors and Texas Instruments C40 DSPs.作者: inculpate 時間: 2025-3-28 16:25
Book 1999 dictates the pace in most engineeringdomains. Nearly all technical products above a certain level ofcomplexity are not only controlled but increasingly even dominated bytheir embedded computer systems. .Traditionally, such embedded control systems have been implemented ina monolithic, centralized w作者: 演講 時間: 2025-3-28 19:45 作者: REIGN 時間: 2025-3-29 02:15 作者: mercenary 時間: 2025-3-29 05:56
1868-4238 ology that dictates the pace in most engineeringdomains. Nearly all technical products above a certain level ofcomplexity are not only controlled but increasingly even dominated bytheir embedded computer systems. .Traditionally, such embedded control systems have been implemented ina monolithic, cen作者: 從屬 時間: 2025-3-29 08:50
https://doi.org/10.1057/9780230252981ocks to describe the system structure, those blocks exchange messages through communication channels, and the dynamic behavior in the leaf blocks is described by means of extended finite state machines.作者: 陳列 時間: 2025-3-29 12:52 作者: ORBIT 時間: 2025-3-29 17:40
Multilanguage Designized as expensive PCBs in earlier times can now be realized on a single chip, which is, of course, much cheaper. Furthermore, low cost broad band communication media are available. Typically, the market requires IT systems that realize a set of specific features for the end user in a given environme作者: Resection 時間: 2025-3-29 20:26 作者: 萬神殿 時間: 2025-3-30 03:11 作者: 豪華 時間: 2025-3-30 04:42 作者: 易于 時間: 2025-3-30 09:34
Software Synthesis from Statechart Models for Real Time Systemsmodeled and simulated at a high level. Automatic translation from the abstract models into implementations significantly reduces overall development time. This paper contributes to the optimized code generation from statechart models. The worst-case execution time of the generated code is reduced.作者: 制定 時間: 2025-3-30 12:22 作者: MUT 時間: 2025-3-30 17:54
Distributed HIL Simulation for the Design of Decentralized Control Structuresrease. One example is a series hybrid vehicle. It consists of an auxiliary power unit, e.g,. an internal combustion engine, and a generator coupled to the crank shaft of the combustion engine, a battery and a drive unit with two electric motors. Each of these vehicle units has its own electronic con作者: 存心 時間: 2025-3-31 00:08
Agent-Based Load Balancing for Mobile Robot Applicationsvironments, complex and reactive sensing-perception-action systems are necessary. Many of these models were already developed and/or are subject of current research (Mertsching, et al., 1997), (Wasson, et al., 1998). On the other hand, questions on how these models can be integrated into the softwar作者: 蛤肉 時間: 2025-3-31 03:51 作者: Metastasis 時間: 2025-3-31 07:28 作者: Complement 時間: 2025-3-31 12:39
Extended SDL-Based Tools for Rapid Prototyping of Application Specific Signal Processorsistributed signal processing software application. SDL, for Specification and Description Language (ITU-Z100, 1996), is a design notation that uses blocks to describe the system structure, those blocks exchange messages through communication channels, and the dynamic behavior in the leaf blocks is d作者: nonsensical 時間: 2025-3-31 16:16
