標題: Titlebook: Cryptographic Hardware and Embedded Systems -- CHES 2010; 12th International W Stefan Mangard,Fran?ois-Xavier Standaert Conference proceedi [打印本頁] 作者: BROOD 時間: 2025-3-21 19:21
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010影響因子(影響力)
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010影響因子(影響力)學科排名
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010網(wǎng)絡(luò)公開度
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010網(wǎng)絡(luò)公開度學科排名
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010被引頻次
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010被引頻次學科排名
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010年度引用
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010年度引用學科排名
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010讀者反饋
書目名稱Cryptographic Hardware and Embedded Systems -- CHES 2010讀者反饋學科排名
作者: ACE-inhibitor 時間: 2025-3-21 21:34 作者: Immobilize 時間: 2025-3-22 02:49 作者: conjunctivitis 時間: 2025-3-22 06:53 作者: connoisseur 時間: 2025-3-22 09:50 作者: 不能根除 時間: 2025-3-22 14:00
Fast Exhaustive Search for Polynomial Systems in ,ure a security level of 64 bits turns out to be feasible in practice with a modest budget. This is a clear demonstration of the computational power of GPUs in solving many types of combinatorial and cryptanalytic problems.作者: 不能根除 時間: 2025-3-22 17:25
A High Speed Coprocessor for Elliptic Curve Scalar Multiplications over ,hic security level. Our implementations show that our architecture is the fastest among the public designs to compute scalar multiplication for elliptic curves defined over a general prime ground field. Our design is based upon the Residue Number System, guaranteeing carry-free arithmetic and easy parallelism. It is SPA resistant and DPA capable.作者: 男生戴手銬 時間: 2025-3-22 22:59 作者: CAPE 時間: 2025-3-23 03:47 作者: 貪婪的人 時間: 2025-3-23 08:48
Neroli Sheldon,Michelle Wallacef seeding material with the fetch of pseudo-random numbers without latency. We describe the consequences of the sponge indifferentiability results to this construction and study the resistance of the construction against generic state recovery attacks. Finally, we propose a concrete example based on a member of the . family with small width.作者: 手術(shù)刀 時間: 2025-3-23 13:23 作者: 惹人反感 時間: 2025-3-23 17:55 作者: transient-pain 時間: 2025-3-23 18:38
Water Linking to Food and Energy,ing SHA-3 competition. To this end, we implemented several architectures in a 90 nm CMOS technology, targeting high- and moderate-speed constraints separately. Thanks to this analysis, we were able to present a complete benchmark of the achieved post-layout results of the circuits.作者: abreast 時間: 2025-3-24 01:05 作者: pulmonary-edema 時間: 2025-3-24 03:43 作者: Entirety 時間: 2025-3-24 09:11 作者: hangdog 時間: 2025-3-24 12:50
Developing a Hardware Evaluation Method for SHA-3 Candidatesing SHA-3 competition. To this end, we implemented several architectures in a 90 nm CMOS technology, targeting high- and moderate-speed constraints separately. Thanks to this analysis, we were able to present a complete benchmark of the achieved post-layout results of the circuits.作者: Arresting 時間: 2025-3-24 14:57 作者: vocation 時間: 2025-3-24 19:31
Michelle Wallace,Neroli Sheldoner implementation tricks allow one to develop efficient scalar multiplication algorithms making use of co-. arithmetic. Specifically, this paper describes efficient co-. based versions of Montgomery ladder and Joye’s double-add algorithm. Further, the resulting implementations are protected against a large variety of implementation attacks.作者: 菊花 時間: 2025-3-24 23:27
Fahad Panolan,Hannane Yaghoubizadel and normal bases can be used in .. Different from the meaning of this . of bases, this paper proposes another . that contributes to the reduction of the critical path delay of .. To the .–inversion architecture, for example, the proposed . inputs and outputs elements represented with normal and polynomial bases, respectively.作者: 孵卵器 時間: 2025-3-25 03:28 作者: poliosis 時間: 2025-3-25 09:24
Contemporary Challenges in E-learning six times the number of traces necessary for breaking a comparable unprotected implementation. At the same time, the presented attack has minimal requirements on the abilities and knowledge of an adversary. The attack requires no detailed knowledge about the design, nor does it require a profiling phase.作者: 巨大沒有 時間: 2025-3-25 14:32
Carolina Haase,Philipp Kindermannrequire only 800 GE, which makes this implementation well suitable for low-cost passive RFID-tags. As a further optimization, using one carefully selected S-box instead of 8 different ones -which is still fully compliant with the standard specifications!- the area requirement can be reduced to 651 GE.作者: 輪流 時間: 2025-3-25 18:28
Deliang Chen,Junguo Liu,Qiuhong Tang, the development of a uniform and practical interface, generation of multiple sets of results for several representative FPGA families from two major vendors, and the application of a simple procedure to convert multiple sets of results into a single ranking.作者: Melodrama 時間: 2025-3-25 22:07 作者: 欄桿 時間: 2025-3-26 03:25
Correlation-Enhanced Power Analysis Collision Attack six times the number of traces necessary for breaking a comparable unprotected implementation. At the same time, the presented attack has minimal requirements on the abilities and knowledge of an adversary. The attack requires no detailed knowledge about the design, nor does it require a profiling phase.作者: Commonwealth 時間: 2025-3-26 06:47
256 Bit Standardized Crypto for 650 GE – GOST Revisitedrequire only 800 GE, which makes this implementation well suitable for low-cost passive RFID-tags. As a further optimization, using one carefully selected S-box instead of 8 different ones -which is still fully compliant with the standard specifications!- the area requirement can be reduced to 651 GE.作者: corn732 時間: 2025-3-26 10:20
Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Ca, the development of a uniform and practical interface, generation of multiple sets of results for several representative FPGA families from two major vendors, and the application of a simple procedure to convert multiple sets of results into a single ranking.作者: 演繹 時間: 2025-3-26 13:43
Spatial Demography and Population Governanceal correlation across regions in terms of process variations. To amplify the Trojan effect on supply current, we propose a region-based vector generation approach, which divides a circuit-under-test (CUT) into several regions and for each region, finds the test vectors which induce maximum activity 作者: 慢慢流出 時間: 2025-3-26 17:44 作者: Condescending 時間: 2025-3-26 22:34 作者: Outmoded 時間: 2025-3-27 01:40 作者: bacteria 時間: 2025-3-27 06:41
Self-referencing: A Scalable Side-Channel Approach for Hardware Trojan Detectional correlation across regions in terms of process variations. To amplify the Trojan effect on supply current, we propose a region-based vector generation approach, which divides a circuit-under-test (CUT) into several regions and for each region, finds the test vectors which induce maximum activity 作者: 弓箭 時間: 2025-3-27 10:37 作者: 世俗 時間: 2025-3-27 16:16
Performance Analysis of the SHA-3 Candidates on Exotic Multi-core Architectureswe use these generic estimates and Cell-/GPU-specific optimization techniques to give more precise figures for our target platforms, and finally, we present implementation results of all 10 non-AES based SHA-3 candidates.作者: 流出 時間: 2025-3-27 20:09 作者: 蜈蚣 時間: 2025-3-27 22:45 作者: commensurate 時間: 2025-3-28 03:00
Sponge-Based Pseudo-Random Number Generatorsembedded security devices as it requires few resources. We propose a model for such generators and explain how to define one on top of a sponge function. The construction is a novel way to use a sponge function, and inputs and outputs blocks in a continuous fashion, allowing to interleave the feed o作者: patriarch 時間: 2025-3-28 07:40 作者: mediocrity 時間: 2025-3-28 14:10 作者: 有斑點 時間: 2025-3-28 17:56 作者: curriculum 時間: 2025-3-28 18:55 作者: 令人作嘔 時間: 2025-3-29 02:37 作者: Cabg318 時間: 2025-3-29 06:37
Correlation-Enhanced Power Analysis Collision Attackermeasures, such as masking, has made further research in collision attacks seemingly in vain. In this work, we show that the principles of collision attacks can be adapted to efficiently break some masked hardware implementation of the AES which still have first-order leakage. The proposed attack b作者: pulmonary 時間: 2025-3-29 08:08 作者: 招致 時間: 2025-3-29 14:54
Flash Memory ‘Bumping’ Attacksbedded memory, which usually stores critical parts of algorithms, sensitive data and cryptographic keys. As a security measure, read-back access to the memory is not implemented leaving only authentication and verification options for integrity check. Verification is usually performed on relatively 作者: 混亂生活 時間: 2025-3-29 17:24 作者: PLIC 時間: 2025-3-29 21:39
When Failure Analysis Meets Side-Channel Attacksemission, electromagnetic emission...). Moreover, the aim of vulnerability analysis, and particularly side-channel analysis, is to observe and collect various leakages information of an integrated circuit (power consumption, electromagnetic emission ...) in order to extract sensitive data. Although 作者: Fsh238 時間: 2025-3-30 01:03 作者: 沖擊力 時間: 2025-3-30 04:03
256 Bit Standardized Crypto for 650 GE – GOST Revisitedis has been done since. So far no weaknesses have been found and GOST is currently under discussion for ISO standardization. Contrary to the cryptographic properties, there has not been much interest in the implementation properties of GOST, though its Feistel structure and the operations of its rou作者: Venules 時間: 2025-3-30 10:39
Mixed Bases for Efficient Inversion in , and Conversion Matrices of SubBytes of AES original ., it is known that its isomorphic tower field . has a more efficient inversion. For the towerings, several kinds of bases such as polynomial and normal bases can be used in .. Different from the meaning of this . of bases, this paper proposes another . that contributes to the reduction of作者: 本能 時間: 2025-3-30 14:53
Developing a Hardware Evaluation Method for SHA-3 Candidatesnd round SHA-3 candidates. Besides the hardware characterization of the 14 candidate algorithms, the main goal of this paper is the description of a reliable methodology to efficiently characterize and compare VLSI circuits of cryptographic primitives. We took the opportunity to apply it on the ongo作者: 小口啜飲 時間: 2025-3-30 18:43
Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Casensus exists on how such an evaluation should be performed in order to make it fair, transparent, practical, and acceptable for the majority of the cryptographic community. In this paper, we formulate a proposal for a fair and comprehensive evaluation methodology, and apply it to the comparison of 作者: 出汗 時間: 2025-3-30 23:58 作者: DUST 時間: 2025-3-31 04:57 作者: arrogant 時間: 2025-3-31 08:15
Neroli Sheldon,Michelle Wallaceircuits at very low cost. In this paper we present two block ciphers PRINTcipher-48 and PRINTcipher-96 that are designed to exploit the properties of IC-printing technology and we further extend recent advances in lightweight block cipher design.作者: 建筑師 時間: 2025-3-31 11:58 作者: Lignans 時間: 2025-3-31 13:21 作者: exorbitant 時間: 2025-3-31 20:48 作者: impale 時間: 2025-3-31 21:44
Michelle Wallace,Neroli Sheldonint multiplication and report new speed records on modern x86-64 based processors. Our different implementations include elliptic curves using Jacobian coordinates, extended Twisted Edwards coordinates and the recently proposed Galbraith-Lin-Scott (GLS) method. Compared to state-of-the-art implement作者: Throttle 時間: 2025-4-1 02:45 作者: innate 時間: 2025-4-1 06:14
Kristal Reynolds,Karen Becker,Julie Flemingble of carrying out efficient automated attacks using live I-cache timing data. Using this analysis technique, we run an I-cache attack on OpenSSL’s DSA implementation and recover keys using lattice methods. Previous I-cache attacks were proof-of-concept: we present results of an actual attack in a 作者: 戰(zhàn)役 時間: 2025-4-1 10:37 作者: 浮雕寶石 時間: 2025-4-1 17:30
Contemporary Challenges in E-learningppropriate choice of selection functions to perform the attack. Depending on their inherent structure and the internal primitives used (Sbox, addition or XOR), some schemes are more prone to side channel analysis than others, as shown by our simulations.作者: coddle 時間: 2025-4-1 19:16
https://doi.org/10.1007/978-981-97-0387-6bedded memory, which usually stores critical parts of algorithms, sensitive data and cryptographic keys. As a security measure, read-back access to the memory is not implemented leaving only authentication and verification options for integrity check. Verification is usually performed on relatively 作者: 黑豹 時間: 2025-4-1 23:06
Spatial Demography and Population GovernanceWhile side-channel analysis has been reported as an effective approach to detect hardware Trojans, increasing process variations in nanoscale technologies pose a major challenge, since process noise can easily mask the Trojan effect on a measured side-channel parameter, such as supply current. Besid作者: 歡樂中國 時間: 2025-4-2 06:14
